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[176.87.122.31]) by smtp.gmail.com with ESMTPSA id f13sm24004818wrq.96.2019.11.06.06.20.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2019 06:20:06 -0800 (PST) From: Richard Henderson X-Google-Original-From: Richard Henderson To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 0/1] arm64: Implement archrandom.h for ARMv8.5-RNG Date: Wed, 6 Nov 2019 15:19:53 +0100 Message-Id: <20191106141954.30657-1-rth@twiddle.net> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191106_062008_120141_B8D76F84 X-CRM114-Status: GOOD ( 11.13 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:444 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, linux-crypto@vger.kernel.org, ard.biesheuvel@linaro.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The ARMv8.5-RNG extension adds a hardware random number generator. The plumbing for this is already present in the kernel; we just have to take advantage of that. Changes since v2: * Keep arch_get_random{,_seed}_long in sync. * Use __cpus_have_const_cap before falling back to this_cpu_has_cap. Changes since v1: * Use __mrs_s and fix missing cc clobber (Mark), * Log rng failures with pr_warn (Mark), * Use __must_check; put RNDR in arch_get_random_long and RNDRRS in arch_get_random_seed_long (Ard), * Use ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE, and check this_cpu_has_cap when reading random data. * Move everything out of line, now that there are 5 other function calls involved, and to unify the rate limiting on the pr_warn. Tested with QEMU. What's not tested is hot plugging cpus with differing capabilities; QEMU would need some extension to allow that sort of thing. r~ Richard Henderson (1): arm64: Implement archrandom.h for ARMv8.5-RNG Documentation/arm64/cpu-feature-registers.rst | 2 + arch/arm64/include/asm/archrandom.h | 35 ++++++++ arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/sysreg.h | 4 + arch/arm64/kernel/cpufeature.c | 13 +++ arch/arm64/kernel/random.c | 79 +++++++++++++++++++ arch/arm64/Kconfig | 12 +++ arch/arm64/kernel/Makefile | 1 + drivers/char/Kconfig | 4 +- 9 files changed, 150 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/include/asm/archrandom.h create mode 100644 arch/arm64/kernel/random.c