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[66.111.4.227]) by smtp.gmail.com with ESMTPSA id v2sm9435343qto.73.2020.02.02.21.03.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Feb 2020 21:03:21 -0800 (PST) Received: from compute6.internal (compute6.nyi.internal [10.202.2.46]) by mailauth.nyi.internal (Postfix) with ESMTP id 54C3E21EC3; Mon, 3 Feb 2020 00:03:18 -0500 (EST) Received: from mailfrontend1 ([10.202.2.162]) by compute6.internal (MEProxy); Mon, 03 Feb 2020 00:03:18 -0500 X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedugedrgeeigdejjecutefuodetggdotefrodftvf curfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfghnecu uegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmdenog fuohhrthgvugftvggtihhpvdculdegtddmnecujfgurhephffvufffkffoggfgsedtkeer tdertddtnecuhfhrohhmpeeuohhquhhnucfhvghnghcuoegsohhquhhnrdhfvghnghesgh hmrghilhdrtghomheqnecuffhomhgrihhnpehkvghrnhgvlhdrohhrghenucfkphephedv rdduheehrdduuddurdejudenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmh grihhlfhhrohhmpegsohhquhhnodhmvghsmhhtphgruhhthhhpvghrshhonhgrlhhithih qdeiledvgeehtdeigedqudejjeekheehhedvqdgsohhquhhnrdhfvghngheppehgmhgrih hlrdgtohhmsehfihigmhgvrdhnrghmvg X-ME-Proxy: Received: from localhost (unknown [52.155.111.71]) by mail.messagingengine.com (Postfix) with ESMTPA id 5119D328005E; Mon, 3 Feb 2020 00:03:16 -0500 (EST) From: Boqun Feng To: linux-pci@vger.kernel.org, linux-hyperv@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 0/3] PCI: hv: Generify pci-hyperv.c Date: Mon, 3 Feb 2020 13:03:10 +0800 Message-Id: <20200203050313.69247-1-boqun.feng@gmail.com> X-Mailer: git-send-email 2.24.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200202_210323_749709_268D6651 X-CRM114-Status: UNSURE ( 8.60 ) X-CRM114-Notice: Please train this message. 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Peter Anvin" , Bjorn Helgaas , Andrew Murray , Thomas Gleixner , "K. Y. Srinivasan" , Boqun Feng Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Hi, This is the first part for virtual PCI support of Hyper-V guest on ARM64. The whole patchset doesn't have any functional change, but only refactors the pci-hyperv.c code to make it more arch-independent. Previous version: v1: https://lore.kernel.org/lkml/20200121015713.69691-1-boqun.feng@gmail.com/ Changes since v1: * Reword the commit log and adjust the title as per Bjorn's suggestion * Split patch #2 into two patches (one for moving and one for adding new structure) as per Bjorn's suggestion * Remove unnecesarry #if guard as per Vitaly's suggestion. * Add explanation for adding hv_set_msi_address_from_desc(). I've done compile and boot test of this patchset, also done some tests with a pass-through NVMe device. Suggestions and comments are welcome! Regards, Boqun Boqun Feng (3): PCI: hv: Move hypercall related definitions into tlfs header PCI: hv: Move retarget related structures into tlfs header PCI: hv: Introduce hv_msi_entry arch/x86/include/asm/hyperv-tlfs.h | 41 +++++++++++++++++++++++++++ arch/x86/include/asm/mshyperv.h | 5 ++++ drivers/pci/controller/pci-hyperv.c | 44 +++-------------------------- 3 files changed, 50 insertions(+), 40 deletions(-)