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Wysocki" , Viresh Kumar , Nishanth Menon , "Stephen Boyd" , Liam Girdwood , Mark Brown Subject: [PATCH 00/12] Add cpufreq and cci devfreq for mt8183, and SVS support Date: Wed, 20 May 2020 11:42:55 +0800 Message-ID: <20200520034307.20435-1-andrew-sh.cheng@mediatek.com> X-Mailer: git-send-email 2.12.5 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200519_204325_651518_7152B8D8 X-CRM114-Status: GOOD ( 11.08 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 MIME_BASE64_TEXT RAW: Message text disguised using base64 encoding -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, "Andrew-sh.Cheng" , srv_heupstream@mediatek.com, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org MT8183 supports CPU DVFS and CCI DVFS, and LITTLE cpus and CCI are in the same voltage domain. So, this series is to add drivers to handle the voltage coupling between CPU and CCI DVFS. For SVS support, need OPP_EVENT_ADJUST_VOLTAGE and corresponding reaction. Change since v5: - Changing dt-binding format to yaml. - Extending current devfreq passive_governor instead of create a new one. - Resend depending patches of Sravana Kannan base on kernel-5.7 Andrew-sh.Cheng (6): cpufreq: mediatek: add clock and regulator enable for intermediate clock dt-bindings: devfreq: add compatible for mt8183 cci devfreq devfreq: add mediatek cci devfreq opp: Modify opp API, dev_pm_opp_get_freq(), find freq in opp, even it is disabled cpufreq: mediatek: add opp notification for SVS support devfreq: mediatek: cci devfreq register opp notification for SVS support Saravana Kannan (6): OPP: Allow required-opps even if the device doesn't have power-domains OPP: Add function to look up required OPP's for a given OPP OPP: Improve required-opps linking PM / devfreq: Cache OPP table reference in devfreq PM / devfreq: Add required OPPs support to passive governor PM / devfreq: Add cpu based scaling support to passive_governor .../devicetree/bindings/devfreq/mt8183-cci.yaml | 51 ++++ drivers/cpufreq/mediatek-cpufreq.c | 122 ++++++++- drivers/devfreq/Kconfig | 12 + drivers/devfreq/Makefile | 1 + drivers/devfreq/devfreq.c | 6 + drivers/devfreq/governor_passive.c | 298 +++++++++++++++++++-- drivers/devfreq/mt8183-cci-devfreq.c | 233 ++++++++++++++++ drivers/opp/core.c | 85 +++++- drivers/opp/of.c | 108 ++++---- drivers/opp/opp.h | 5 + include/linux/devfreq.h | 42 ++- include/linux/pm_opp.h | 11 + 12 files changed, 874 insertions(+), 100 deletions(-) create mode 100644 Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml create mode 100644 drivers/devfreq/mt8183-cci-devfreq.c