From patchwork Wed Jun 24 17:52:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Catalin Marinas X-Patchwork-Id: 11623979 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4875890 for ; Wed, 24 Jun 2020 17:55:39 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1D9452078E for ; Wed, 24 Jun 2020 17:55:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="qVP5YNhz" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1D9452078E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=YhCvrCBSIX+yk2ej/WDk9m9EI52nMNdwjMGoXbI8ZyI=; b=qVP5YNhzlY4nMm+cFkTiWAFyXx lrLWde0zWevjfgZcj1pI+QVz0i43H+fnGoCysE5fCCNe5YvhV6zWLs03BCjJLLRl6Q7+s7+QuOXLK iOuROxahyaH7h7t1mraOSxPOeL9hw7M6l3bHeiQVhNgpPOjHPonjYgg0iQKcTDhv7wC32H4anxj+4 eVGri/rg5d+hgniwwaJ2D4j2wer0k2FjzC0490fjlYZAXVvGj8GnTHle/Qpq0W3VRk+E4J7+j0AcV bpiceHcaOb2oD28nkmRZJvVGsrQ2HY2eSju6Iz03JtOVH/YYHmUU3fx8852TnKymCw/tYaTdxhN1C /g8T3nzQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jo9Zu-00041f-5a; Wed, 24 Jun 2020 17:52:54 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jo9Zp-0003yn-0z for linux-arm-kernel@lists.infradead.org; Wed, 24 Jun 2020 17:52:50 +0000 Received: from localhost.localdomain (unknown [2.26.170.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id EC19B2077D; Wed, 24 Jun 2020 17:52:45 +0000 (UTC) From: Catalin Marinas To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 00/25] arm64: Memory Tagging Extension user-space support Date: Wed, 24 Jun 2020 18:52:19 +0100 Message-Id: <20200624175244.25837-1-catalin.marinas@arm.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -5.0 (-----) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-5.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [198.145.29.99 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Szabolcs Nagy , Andrey Konovalov , Kevin Brodsky , Peter Collingbourne , linux-mm@kvack.org, Andrew Morton , Vincenzo Frascino , Will Deacon , Dave P Martin Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This is the 5th version (4th version here [1]) of the series adding user-space support for the ARMv8.5 Memory Tagging Extension ([2], [3]). The patches are also available on this branch: git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux devel/mte-v5 There are no user ABI changes from v4 and I do not anticipate further updates affecting the ABI. Subsequent ABI improvements, if needed, will be done in a backwards-compatible manner. The glibc counterpart is also under discussion [4]. My plan is to push these patches into linux-next for wider coverage, with an aim for merging into 5.9 unless major reworking is needed. I would be grateful if mm folks review/ack/nak those patches touching mm/ (and, of course, any other patch in this series, feedback always welcomed). Thank you. Changes in this version: - Removed the Device Tree memory node description requirement after agreement with the hardware architects that the CPUID should reflect the features supported by the general purpose memory. - Dropped the command line argument to disable MTE at boot in the absence of a strong argument in its favour. - Fixed handling of compound pages (inadvertently clearing valid tags in previously mapped small pages). - Some reworking of the copy_{user,}highpage() functions. - Rebased to 5.8-rc2 [1] https://lore.kernel.org/linux-arm-kernel/20200515171612.1020-1-catalin.marinas@arm.com/ [2] https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/enhancing-memory-safety [3] https://developer.arm.com/-/media/Arm%20Developer%20Community/PDF/Arm_Memory_Tagging_Extension_Whitepaper.pdf [4] https://sourceware.org/pipermail/libc-alpha/2020-June/115039.html Catalin Marinas (13): arm64: mte: Use Normal Tagged attributes for the linear map arm64: mte: Clear the tags when a page is mapped in user-space with PROT_MTE arm64: Avoid unnecessary clear_user_page() indirection arm64: mte: Tags-aware aware memcmp_pages() implementation arm64: mte: Add PROT_MTE support to mmap() and mprotect() mm: Introduce arch_validate_flags() arm64: mte: Validate the PROT_MTE request via arch_validate_flags() mm: Allow arm64 mmap(PROT_MTE) on RAM-based files arm64: mte: Allow user control of the tag check mode via prctl() arm64: mte: Allow user control of the generated random tags via prctl() arm64: mte: Restore the GCR_EL1 register after a suspend arm64: mte: Add PTRACE_{PEEK,POKE}MTETAGS support fs: Handle intra-page faults in copy_mount_options() Kevin Brodsky (1): mm: Introduce arch_calc_vm_flag_bits() Steven Price (4): mm: Add PG_ARCH_2 page flag mm: Add arch hooks for saving/restoring tags arm64: mte: Enable swap of tagged pages arm64: mte: Save tags when hibernating Vincenzo Frascino (7): arm64: mte: system register definitions arm64: mte: CPU feature detection and initial sysreg configuration arm64: mte: Add specific SIGSEGV codes arm64: mte: Handle synchronous and asynchronous tag check faults arm64: mte: Tags-aware copy_{user_,}highpage() implementations arm64: mte: Kconfig entry arm64: mte: Add Memory Tagging Extension documentation Documentation/arm64/cpu-feature-registers.rst | 2 + Documentation/arm64/elf_hwcaps.rst | 4 + Documentation/arm64/index.rst | 1 + .../arm64/memory-tagging-extension.rst | 297 ++++++++++++++++ arch/arm64/Kconfig | 29 ++ arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/cpufeature.h | 6 + arch/arm64/include/asm/hwcap.h | 1 + arch/arm64/include/asm/kvm_arm.h | 3 +- arch/arm64/include/asm/memory.h | 17 +- arch/arm64/include/asm/mman.h | 56 ++- arch/arm64/include/asm/mte.h | 86 +++++ arch/arm64/include/asm/page.h | 19 +- arch/arm64/include/asm/pgtable-prot.h | 2 + arch/arm64/include/asm/pgtable.h | 46 ++- arch/arm64/include/asm/processor.h | 4 + arch/arm64/include/asm/sysreg.h | 61 ++++ arch/arm64/include/asm/thread_info.h | 4 +- arch/arm64/include/uapi/asm/hwcap.h | 1 + arch/arm64/include/uapi/asm/mman.h | 1 + arch/arm64/include/uapi/asm/ptrace.h | 4 + arch/arm64/kernel/Makefile | 1 + arch/arm64/kernel/cpufeature.c | 61 ++++ arch/arm64/kernel/cpuinfo.c | 1 + arch/arm64/kernel/entry.S | 37 ++ arch/arm64/kernel/hibernate.c | 118 +++++++ arch/arm64/kernel/mte.c | 331 ++++++++++++++++++ arch/arm64/kernel/process.c | 31 +- arch/arm64/kernel/ptrace.c | 9 +- arch/arm64/kernel/signal.c | 8 + arch/arm64/kernel/suspend.c | 4 + arch/arm64/kernel/syscall.c | 10 + arch/arm64/lib/Makefile | 2 + arch/arm64/lib/mte.S | 151 ++++++++ arch/arm64/mm/Makefile | 1 + arch/arm64/mm/copypage.c | 25 +- arch/arm64/mm/dump.c | 4 + arch/arm64/mm/fault.c | 9 +- arch/arm64/mm/mmu.c | 22 +- arch/arm64/mm/mteswap.c | 82 +++++ arch/arm64/mm/proc.S | 8 +- arch/x86/kernel/signal_compat.c | 2 +- fs/namespace.c | 24 +- fs/proc/page.c | 3 + fs/proc/task_mmu.c | 4 + include/{linux => asm-generic}/pgtable.h | 222 ++---------- include/linux/kernel-page-flags.h | 1 + include/linux/mm.h | 8 + include/linux/mman.h | 22 +- include/linux/page-flags.h | 3 + include/linux/pgtable.h | 23 ++ include/trace/events/mmflags.h | 9 +- include/uapi/asm-generic/siginfo.h | 4 +- include/uapi/linux/prctl.h | 9 + mm/Kconfig | 3 + mm/mmap.c | 9 + mm/mprotect.c | 6 + mm/page_io.c | 10 + mm/shmem.c | 9 + mm/swapfile.c | 2 + mm/util.c | 2 +- tools/vm/page-types.c | 2 + 62 files changed, 1704 insertions(+), 235 deletions(-) create mode 100644 Documentation/arm64/memory-tagging-extension.rst create mode 100644 arch/arm64/include/asm/mte.h create mode 100644 arch/arm64/kernel/mte.c create mode 100644 arch/arm64/lib/mte.S create mode 100644 arch/arm64/mm/mteswap.c copy include/{linux => asm-generic}/pgtable.h (85%)