Message ID | 20200706125425.1671020-1-maz@kernel.org (mailing list archive) |
---|---|
Headers | show |
Series | KVM: arm64: Preliminary NV patches | expand |
On Mon, Jul 06, 2020 at 01:54:08PM +0100, Marc Zyngier wrote: > Catalin: How do you want to proceed for patches 2, 3, and 4? I could > make a stable branch that gets you pull into the arm64 tree, or the > other way around. Just let me know. Please create a separate branch for the S2 TTL patches (ideally based on no later than -rc3). I plan to queue the rest of Zhenyu's patches on top. https://lore.kernel.org/linux-arm-kernel/20200625080314.230-1-yezhenyu2@huawei.com/ Thanks.
Hi Catalin, On Mon, 06 Jul 2020 18:27:48 +0100, Catalin Marinas <catalin.marinas@arm.com> wrote: > > On Mon, Jul 06, 2020 at 01:54:08PM +0100, Marc Zyngier wrote: > > Catalin: How do you want to proceed for patches 2, 3, and 4? I could > > make a stable branch that gets you pull into the arm64 tree, or the > > other way around. Just let me know. > > Please create a separate branch for the S2 TTL patches (ideally based on > no later than -rc3). I plan to queue the rest of Zhenyu's patches on > top. > > https://lore.kernel.org/linux-arm-kernel/20200625080314.230-1-yezhenyu2@huawei.com/ I've now pushed out this branch[1], containing the three patches in isolation. Unless you tell me otherwise, I will push this into -next today, together with the rest of the KVM/arm64 queue. Thanks, M. [1] git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/ttl-for-arm64
Hi, On 7/6/20 1:54 PM, Marc Zyngier wrote: > Hi all, > > In order not to repeat the 90+ patch series that resulted in a > deafening silence last time, I've extracted a smaller set of patches > that form the required dependencies that allow the rest of the 65 NV > patches to be added on top. Yes, it is that bad. > > The one real feature here is support for the ARMv8.4-TTL extension at > Stage-2 only. The reason to support it is that it helps the hypervisor > a lot when it comes to finding out how much to invalidate. It is thus > always "supported" with NV. > > The rest doesn't contain any functionality change. Most of it reworks > existing data structures and adds new accessors for the things that > get moved around. The reason for this is that: > > - With NV, we end-up with multiple Stage-2 MMU contexts per VM instead > of a single one. This requires we divorce struct kvm from the S2 MMU > configuration. Of course, we stick with a single MMU context for now. > > - With ARMv8.4-NV, a number of system register accesses are turned > into memory accesses into the so-called VNCR page. It is thus > convenient to make this VNCR page part of the vcpu context and avoid > copying data back and forth. For this to work, we need to make sure > that all the VNCR-aware sysregs are moved into our per-vcpu sys_regs > array instead of leaving in other data structures (the timers, for > example). The VNCR page itself isn't introduced with these patches. > > - As some of these data structures change, we need a way to isolate > the userspace ABI from such change. > > There is also a number of cleanups that were in the full fat series > that I decided to move early to get them out of the way. > > The whole this is a bit of a mix of vaguely unrelated "stuff", but it > all comes together if you look at the final series. This applies on > top of David Brazdil's series splitting the VHE and nVHE objects. > > I plan on taking this early into v5.9, and I really mean it this time! > > Catalin: How do you want to proceed for patches 2, 3, and 4? I could > make a stable branch that gets you pull into the arm64 tree, or the > other way around. Just let me know. > > Thanks, > > M. > > * From v2: > - Rebased on top of David's el2-obj series I tried to apply the patches on top of v5.8-rc1, but I get a conflict on the very first patch. I guess it's because I don't have the el2-obj series. Is that v4 of "Split off nVHE hyp code" patches from David Brazil? Thanks, Alex
Hi, On 7/7/20 12:24 PM, Alexandru Elisei wrote: > Hi, > > On 7/6/20 1:54 PM, Marc Zyngier wrote: >> Hi all, >> >> In order not to repeat the 90+ patch series that resulted in a >> deafening silence last time, I've extracted a smaller set of patches >> that form the required dependencies that allow the rest of the 65 NV >> patches to be added on top. Yes, it is that bad. >> >> The one real feature here is support for the ARMv8.4-TTL extension at >> Stage-2 only. The reason to support it is that it helps the hypervisor >> a lot when it comes to finding out how much to invalidate. It is thus >> always "supported" with NV. >> >> The rest doesn't contain any functionality change. Most of it reworks >> existing data structures and adds new accessors for the things that >> get moved around. The reason for this is that: >> >> - With NV, we end-up with multiple Stage-2 MMU contexts per VM instead >> of a single one. This requires we divorce struct kvm from the S2 MMU >> configuration. Of course, we stick with a single MMU context for now. >> >> - With ARMv8.4-NV, a number of system register accesses are turned >> into memory accesses into the so-called VNCR page. It is thus >> convenient to make this VNCR page part of the vcpu context and avoid >> copying data back and forth. For this to work, we need to make sure >> that all the VNCR-aware sysregs are moved into our per-vcpu sys_regs >> array instead of leaving in other data structures (the timers, for >> example). The VNCR page itself isn't introduced with these patches. >> >> - As some of these data structures change, we need a way to isolate >> the userspace ABI from such change. >> >> There is also a number of cleanups that were in the full fat series >> that I decided to move early to get them out of the way. >> >> The whole this is a bit of a mix of vaguely unrelated "stuff", but it >> all comes together if you look at the final series. This applies on >> top of David Brazdil's series splitting the VHE and nVHE objects. >> >> I plan on taking this early into v5.9, and I really mean it this time! >> >> Catalin: How do you want to proceed for patches 2, 3, and 4? I could >> make a stable branch that gets you pull into the arm64 tree, or the >> other way around. Just let me know. >> >> Thanks, >> >> M. >> >> * From v2: >> - Rebased on top of David's el2-obj series > I tried to apply the patches on top of v5.8-rc1, but I get a conflict on the very > first patch. I guess it's because I don't have the el2-obj series. Is that v4 of > "Split off nVHE hyp code" patches from David Brazil? Nevermind, figured it out and used your kvm-arm64/el2-obj-4.1 branch as a base. Thanks, Alex
On 2020-07-07 12:24, Alexandru Elisei wrote: > Hi, > > On 7/6/20 1:54 PM, Marc Zyngier wrote: >> Hi all, >> >> In order not to repeat the 90+ patch series that resulted in a >> deafening silence last time, I've extracted a smaller set of patches >> that form the required dependencies that allow the rest of the 65 NV >> patches to be added on top. Yes, it is that bad. >> >> The one real feature here is support for the ARMv8.4-TTL extension at >> Stage-2 only. The reason to support it is that it helps the hypervisor >> a lot when it comes to finding out how much to invalidate. It is thus >> always "supported" with NV. >> >> The rest doesn't contain any functionality change. Most of it reworks >> existing data structures and adds new accessors for the things that >> get moved around. The reason for this is that: >> >> - With NV, we end-up with multiple Stage-2 MMU contexts per VM instead >> of a single one. This requires we divorce struct kvm from the S2 MMU >> configuration. Of course, we stick with a single MMU context for >> now. >> >> - With ARMv8.4-NV, a number of system register accesses are turned >> into memory accesses into the so-called VNCR page. It is thus >> convenient to make this VNCR page part of the vcpu context and avoid >> copying data back and forth. For this to work, we need to make sure >> that all the VNCR-aware sysregs are moved into our per-vcpu sys_regs >> array instead of leaving in other data structures (the timers, for >> example). The VNCR page itself isn't introduced with these patches. >> >> - As some of these data structures change, we need a way to isolate >> the userspace ABI from such change. >> >> There is also a number of cleanups that were in the full fat series >> that I decided to move early to get them out of the way. >> >> The whole this is a bit of a mix of vaguely unrelated "stuff", but it >> all comes together if you look at the final series. This applies on >> top of David Brazdil's series splitting the VHE and nVHE objects. >> >> I plan on taking this early into v5.9, and I really mean it this time! >> >> Catalin: How do you want to proceed for patches 2, 3, and 4? I could >> make a stable branch that gets you pull into the arm64 tree, or the >> other way around. Just let me know. >> >> Thanks, >> >> M. >> >> * From v2: >> - Rebased on top of David's el2-obj series > > I tried to apply the patches on top of v5.8-rc1, but I get a conflict > on the very > first patch. I guess it's because I don't have the el2-obj series. Is > that v4 of > "Split off nVHE hyp code" patches from David Brazil? You need the slightly amended version (kvm-arm6/el2-obj-v4.1 from my tree). Otherwise, just pick kvmarm/next, which has everything put together in one scary lot. Thanks, M.