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Sun, 12 Jul 2020 17:25:16 -0700 (PDT) From: Sven Van Asbroeck X-Google-Original-From: Sven Van Asbroeck To: shawnguo@kernel.org, s.hauer@pengutronix.de Subject: [PATCH v1 0/5] imx6qp QuadPlus: support improved enet clocking Date: Sun, 12 Jul 2020 20:25:07 -0400 Message-Id: <20200713002512.28742-1-TheSven73@gmail.com> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200712_202520_498460_529DA5F9 X-CRM114-Status: GOOD ( 12.26 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2607:f8b0:4864:20:0:0:0:742 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [thesven73[at]gmail.com] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [thesven73[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, NXP Linux Team , Pengutronix Kernel Team , Fabio Estevam , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org On the imx6qp QuadPlus, the h/w designers have improved enet clocking. This patchset extends the clock tree to reflect the situation on QuadPlus. This allows board designers to choose the enet clocking method by making simple clocktree changes in the devicetree. Default setting: external routing of enet_ref from pad to pad. Example, change the default to enet_ref @ 125MHz clock routed internally: &fec { assigned-clocks = <&clks IMX6QDL_CLK_ENET_PTP>, <&clks IMX6QDL_CLK_ENET_REF>; assigned-clock-parents = <&clks IMX6QDL_CLK_ENET_REF>; assigned-clock-rates = <0>, <125000000>; }; To: Shawn Guo To: Sascha Hauer Cc: Pengutronix Kernel Team Cc: Fabio Estevam Cc: NXP Linux Team Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-clk@vger.kernel.org Sven Van Asbroeck (5): ARM: mach-imx6q: do not select enet PTP clock source on QuadPlus clk: imx: add simple regmap-backed clock mux dt-bindings: imx6qdl-clock: add QuadPlus enet clocks clk: imx6q: support improved enet clocking on QuadPlus ARM: dts: imx6qp: support improved enet clocking on QuadPlus .../bindings/clock/imx6q-clock.yaml | 2 + arch/arm/boot/dts/imx6qp.dtsi | 3 + arch/arm/mach-imx/mach-imx6q.c | 4 + drivers/clk/imx/Makefile | 1 + drivers/clk/imx/clk-imx6q.c | 46 ++++++++ drivers/clk/imx/clk-mux-regmap.c | 110 ++++++++++++++++++ drivers/clk/imx/clk.h | 7 ++ include/dt-bindings/clock/imx6qdl-clock.h | 5 +- include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 1 + 9 files changed, 178 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/imx/clk-mux-regmap.c