Message ID | 20200718193457.30046-1-vdumpa@nvidia.com (mailing list archive) |
---|---|
Headers | show |
Series | NVIDIA ARM SMMU Implementation | expand |
On Sat, 18 Jul 2020 12:34:52 -0700, Krishna Reddy wrote: > Changes in v11: > Addressed Rob comment on DT binding patch to set min/maxItems of reg property in else part. > Rebased on top of https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/log/?h=for-joerg/arm-smmu/updates. > > Changes in v10: > Perform SMMU base ioremap before calling implementation init. > Check for Global faults across both ARM MMU-500s during global interrupt. > Check for context faults across all contexts of both ARM MMU-500s during context fault interrupt. > Add new DT binding nvidia,smmu-500 for NVIDIA implementation. > https://lkml.org/lkml/2020/7/8/57 > > [...] Applied to will (for-joerg/arm-smmu/updates), thanks! [1/5] iommu/arm-smmu: move TLB timeout and spin count macros https://git.kernel.org/will/c/cd8479cf0de9 [2/5] iommu/arm-smmu: ioremap smmu mmio region before implementation init https://git.kernel.org/will/c/6c019f4e697e [3/5] iommu/arm-smmu: add NVIDIA implementation for ARM MMU-500 usage https://git.kernel.org/will/c/aab5a1c88276 [4/5] dt-bindings: arm-smmu: add binding for Tegra194 SMMU https://git.kernel.org/will/c/3d2deb0cdb69 [5/5] iommu/arm-smmu: Add global/context fault implementation hooks https://git.kernel.org/will/c/aa7ec73297df Cheers,