From patchwork Mon Aug 17 01:46:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 11716279 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 184B115E4 for ; Mon, 17 Aug 2020 01:47:34 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E6A76206F4 for ; Mon, 17 Aug 2020 01:47:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="mfnxjagr" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E6A76206F4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=toshiba.co.jp Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=xKfWFB5Plh+8tLnld7GWtWmb9ksgtArBndrr3jwNaqU=; b=mfnxjagrVj0cITRGKu6Xvk6HNZ t2rvDQXfj72MTFGrPsArIPVYYd9VAQmul/HemALmIPX4zc44YyQb1mekveIBujT2oxpln2frJyuIC crhUcw31HxwUmhpIuPL6rULOE5FjjxxjWS3G1pQWHlL0uXjRLGgW1x2DilSfMigHm9yxfgC/GJnfx xpYQoE5vjb06dd9Lk3iopcCkE8wT3+xrtKtF3OApOxWp0kSptae4piQ8omjnYCybaksyCE4l9ysOg G1RYPzp1gO5A2tbVpnV9HJ6v4G4JozT84qlJwa9D/U9H5r0SJFz/Y4TT0u90Im0BajQkT+0uJ6rzv khwV6Prw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k7UEw-0006kz-ND; Mon, 17 Aug 2020 01:47:10 +0000 Received: from mo-csw1116.securemx.jp ([210.130.202.158] helo=mo-csw.securemx.jp) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k7UEo-0006de-Tq for linux-arm-kernel@lists.infradead.org; Mon, 17 Aug 2020 01:47:05 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1116) id 07H1ki0a024877; Mon, 17 Aug 2020 10:46:44 +0900 X-Iguazu-Qid: 2wGrGhpI0HNoi88eAq X-Iguazu-QSIG: v=2; s=0; t=1597628804; q=2wGrGhpI0HNoi88eAq; m=cosVoQDNupwSKo8qNjFAm/e9kLJtIY+2/3exkBrGzJk= Received: from imx12.toshiba.co.jp (imx12.toshiba.co.jp [61.202.160.132]) by relay.securemx.jp (mx-mr1111) id 07H1kgG4009533; Mon, 17 Aug 2020 10:46:43 +0900 Received: from enc03.toshiba.co.jp ([106.186.93.13]) by imx12.toshiba.co.jp with ESMTP id 07H1kgVL001549; Mon, 17 Aug 2020 10:46:42 +0900 (JST) Received: from hop101.toshiba.co.jp ([133.199.85.107]) by enc03.toshiba.co.jp with ESMTP id 07H1kdHW023560; Mon, 17 Aug 2020 10:46:42 +0900 From: Nobuhiro Iwamatsu To: Rob Herring , Linus Walleij , Catalin Marinas , Will Deacon Subject: [PATCH 0/8] Add Toshiba Visconti ARM64 Platform support Date: Mon, 17 Aug 2020 10:46:24 +0900 X-TSB-HOP: ON Message-Id: <20200817014632.595898-1-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200816_214703_460556_FB7E5CC7 X-CRM114-Status: GOOD ( 16.52 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [210.130.202.158 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [210.130.202.158 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, punit1.agrawal@toshiba.co.jp, linux-gpio@vger.kernel.org, Nobuhiro Iwamatsu , yuji2.ishikawa@toshiba.co.jp, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Hi, Visconti is a series of Toshiba's SoCs targeting image processing applications[0]. These set of patches adds support for Visconti5 a Arm v8 based SoC. The series add minimal support for the Visconti5 SoC and the TMPV7708 RM main board. Peripherals such as UART, SPI, I2c and timer use Arm's IP and work with the existing kernel drivers in the tree. The series includes a pinctrl driver to select appropriate functions on the pins. NOTE: Because Visconti5 does not have PSCI, it uses spin-table with enable-method. And this patch series does not include a clock framework, so it is a device-tree file that uses clocks with fixed-clock. This will be replaced by the clock driver in the future. [0]: https://toshiba.semicon-storage.com/ap-en/semiconductor/product/image-recognition-processors-visconti.html Best regards, Nobuhiro Nobuhiro Iwamatsu (8): dt-bindings: pinctrl: Add bindings for Toshiba Visconti TMPV7700 SoC pinctrl: visconti: Add Toshiba Visconti SoCs pinctrl support dt-bindings: arm: toshiba: add Toshiba Visconti ARM SoCs dt-bindings: arm: toshiba: Add the TMPV7708 RM main board arm64: visconti: Add initial support for Toshiba Visconti platform arm64: dts: visconti: Add device tree for TMPV7708 RM main board MAINTAINERS: Add information for Toshiba Visconti ARM SoCs arm64: defconfig: Enable configs for Toshiba Visconti .../devicetree/bindings/arm/toshiba.yaml | 22 + .../pinctrl/toshiba,visconti-pinctrl.yaml | 82 ++++ MAINTAINERS | 11 + arch/arm64/Kconfig.platforms | 7 + arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/toshiba/Makefile | 2 + .../boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 44 ++ arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 390 ++++++++++++++++++ .../arm64/boot/dts/toshiba/tmpv7708_pins.dtsi | 93 +++++ arch/arm64/configs/defconfig | 1 + drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/visconti/Kconfig | 14 + drivers/pinctrl/visconti/Makefile | 3 + drivers/pinctrl/visconti/pinctrl-common.c | 320 ++++++++++++++ drivers/pinctrl/visconti/pinctrl-common.h | 96 +++++ drivers/pinctrl/visconti/pinctrl-tmpv7700.c | 355 ++++++++++++++++ 17 files changed, 1443 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/toshiba.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml create mode 100644 arch/arm64/boot/dts/toshiba/Makefile create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708.dtsi create mode 100644 arch/arm64/boot/dts/toshiba/tmpv7708_pins.dtsi create mode 100644 drivers/pinctrl/visconti/Kconfig create mode 100644 drivers/pinctrl/visconti/Makefile create mode 100644 drivers/pinctrl/visconti/pinctrl-common.c create mode 100644 drivers/pinctrl/visconti/pinctrl-common.h create mode 100644 drivers/pinctrl/visconti/pinctrl-tmpv7700.c