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Tue, 01 Sep 2020 22:44:04 -0800 Received: from MTKMBS06N2.mediatek.inc (172.21.101.130) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 1 Sep 2020 23:34:01 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 2 Sep 2020 14:34:00 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 2 Sep 2020 14:33:59 +0800 From: Mark-PK Tsai To: , Subject: [PATCH v3 0/2] Add MStar interrupt controller support Date: Wed, 2 Sep 2020 14:33:42 +0800 Message-ID: <20200902063344.1852-1-mark-pk.tsai@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-TM-SNTS-SMTP: 2774D7340570A9ED91DE96DFC9244A13846B9F0DE513AC10544567D01A222CA22000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200902_024408_098996_98401CAC X-CRM114-Status: GOOD ( 10.64 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 MIME_BASE64_TEXT RAW: Message text disguised using base64 encoding -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, alix.wu@mediatek.com, jason@lakedaemon.net, yj.chiang@mediatek.com, daniel@0x0f.com, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, mark-pk.tsai@mediatek.com, matthias.bgg@gmail.com, tglx@linutronix.de, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org MStar contain a legacy interrupt controller that routes interrupts to the GIC. SigmaStar and Mediatek TV SoCs also have this interrupt controller IP. Mark-PK Tsai (2): irqchip: irq-mst: Add MStar interrupt controller support dt-bindings: interrupt-controller: Add MStar interrupt controller .../interrupt-controller/mstar,mst-intc.yaml | 64 ++++++ MAINTAINERS | 7 + drivers/irqchip/Kconfig | 8 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-mst-intc.c | 199 ++++++++++++++++++ 5 files changed, 279 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mstar,mst-intc.yaml create mode 100644 drivers/irqchip/irq-mst-intc.c