From patchwork Wed Oct 21 10:46:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qais Yousef X-Patchwork-Id: 11848909 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12C14C4363A for ; Wed, 21 Oct 2020 10:47:52 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 77BD220795 for ; Wed, 21 Oct 2020 10:47:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="VvB6DJ5a" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 77BD220795 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=5upORBOlGskGrs5zaRDtF01q84LfiBy7Q0Xyiir06fg=; b=VvB6DJ5aRgSp1wZ10R+OVLQuhQ 23UhKF2QmbnOR84XtfP5/WqeCZ+eKFDsHwwBrvfP36iIIY/In4G1aOvMce0RArlImZISH33ouTfF3 NWN0denDxYGYJJU2J/teN+S07Pr0od2RLfo1x0n/r8oktau5Rcm+/M921B7tiuayT46lihFJMZOIN bJf5ZJnRxp6PiwdA2yGGFM2pHBfuF8ylhkRjbs0HJ0GLZIcBG6LwNNjfrzeLFfJVWYilP+DT0kudA hexDgF6KvS2PmcPZ10q03RvVoKOTeZdg0eampEtIsrF/cgmXJG0YhIO/7EHAjiQBLz7qX9ETKEZQr jPhV/buw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kVBde-0008Qg-AB; Wed, 21 Oct 2020 10:46:38 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kVBdb-0008Or-Dr for linux-arm-kernel@lists.infradead.org; Wed, 21 Oct 2020 10:46:36 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2C4D71FB; Wed, 21 Oct 2020 03:46:33 -0700 (PDT) Received: from e107158-lin.cambridge.arm.com (e107158-lin.cambridge.arm.com [10.1.194.78]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B0F6E3F66E; Wed, 21 Oct 2020 03:46:31 -0700 (PDT) From: Qais Yousef To: Catalin Marinas , Will Deacon , Marc Zyngier , "Peter Zijlstra (Intel)" Subject: [RFC PATCH v2 0/4] Add support for Asymmetric AArch32 systems Date: Wed, 21 Oct 2020 11:46:07 +0100 Message-Id: <20201021104611.2744565-1-qais.yousef@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201021_064635_511870_E4FACEDB X-CRM114-Status: GOOD ( 14.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Greg Kroah-Hartman , Qais Yousef , James Morse , Linus Torvalds , Morten Rasmussen , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series adds basic support for Asymmetric AArch32 systems. Full rationale is in v1's cover letter. https://lore.kernel.org/linux-arch/20201008181641.32767-1-qais.yousef@arm.com/ Changes in v2: * We now reset vcpu->arch.target to force re-initialized for KVM patch. (Marc) * Fix a bug where this_cpu_has_cap() must be called with preemption disabled in check_aarch32_cpumask(). * Add new sysctl.enable_asym_32bit. (Catalin) * Export id_aar64fpr0 register in sysfs which allows user space to discover which cpus support 32bit@EL0. The sysctl must be enabled for the user space to discover the asymmetry. (Will/Catalin) * Fixing up affinity in the kernel approach was dropped. The support assumes the user space that wants to enable this support knows how to guarantee correct affinities for 32bit apps by using cpusets. Open questions: * Should there be any extra handling at execve() time? At the moment we allow the app to start and only SIGKILL it after it has moved to the 'wrong' cpu. We could be stricter and do the check earlier when the elf is loaded. Thanks --- Qais Yousef Qais Yousef (4): arm64: kvm: Handle Asymmetric AArch32 systems arm64: Add support for asymmetric AArch32 EL0 configurations arm64: export emulate_sys_reg() arm64: Export id_aar64fpr0 via sysfs Documentation/arm64/cpu-feature-registers.rst | 2 +- arch/arm64/include/asm/cpu.h | 1 + arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/cpufeature.h | 22 +++- arch/arm64/include/asm/thread_info.h | 5 +- arch/arm64/kernel/cpufeature.c | 72 ++++++----- arch/arm64/kernel/cpuinfo.c | 116 +++++++++++++----- arch/arm64/kernel/process.c | 17 +++ arch/arm64/kernel/signal.c | 24 ++++ arch/arm64/kvm/arm.c | 14 +++ arch/arm64/kvm/guest.c | 2 +- arch/arm64/kvm/sys_regs.c | 8 +- kernel/sysctl.c | 11 ++ 13 files changed, 226 insertions(+), 71 deletions(-)