From patchwork Fri Nov 6 12:53:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ionela Voinescu X-Patchwork-Id: 11887129 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C6B3FC2D0A3 for ; Fri, 6 Nov 2020 12:55:25 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4DE6A206C1 for ; Fri, 6 Nov 2020 12:55:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="wQTcynEb" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4DE6A206C1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Owner; bh=gW52d172MajX+NFYbPs8YDNce4XQSHrxLArxkrcJLf0=; b=wQTcynEbpMHC5RIzhttQfztcBW 1gz6Nwfi7jjySsGn88aS2H2LGiTHXjZ6Ba/Ra7F2cgC1K2HKFut5CFUbQLXVpR0/eKE5f/BEOX8QI 1O96pPdS65MdYJwLx0vdWvSCIJsDPEhTrl00IC+4Iy7uZU8QkH2FPqB73zLEco8FGzqIqQigbf+IM a1uMpgzHk/GDxf/veIWSTytpo7VjkhQJEtAJ7p5QKTEt/AjTRr+nUfP/K+uf6BgLrWZuiXWd2BcT2 f/Cr0bHek7T9lZSB+5iv5YuSzHo/NfuqLOj0dY+7HIywQ2CCEFUoIDxO/eaAC1CvLdeXTgJrQifSl DmuG4Vzw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kb1Fu-0007c9-8F; Fri, 06 Nov 2020 12:54:14 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kb1Fr-0007aK-I6 for linux-arm-kernel@lists.infradead.org; Fri, 06 Nov 2020 12:54:12 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3EA6D1474; Fri, 6 Nov 2020 04:54:05 -0800 (PST) Received: from e108754-lin.cambridge.arm.com (unknown [10.1.198.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 234D03F718; Fri, 6 Nov 2020 04:54:04 -0800 (PST) From: Ionela Voinescu To: catalin.marinas@arm.com, mark.rutland@arm.com, sudeep.holla@arm.com, will@kernel.org Subject: [PATCH v4 0/3] arm64: cppc: add FFH support using AMUs Date: Fri, 6 Nov 2020 12:53:31 +0000 Message-Id: <20201106125334.21570-1-ionela.voinescu@arm.com> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201106_075411_754111_4F56D5D7 X-CRM114-Status: GOOD ( 13.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ionela.voinescu@arm.com, morten.rasmussen@arm.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi guys, Many thanks for everyone's review. This series adds support for CPPC's delivered and reference performance counters through the FFH methods by using the AMU equivalent core and constant cycle counters. This support is added in patch 3/3, while the first 2 patches generalise the existing AMU counter read and validation functionality to be reused for this usecase. The specification that drove this implementation can be found at [1], chapter 3.2. v3 -> v4: - v3 can be found at [4] - 1/3, 3/3: Modified counter read functions as per Mark's suggestions. - This version is based on v5.10-rc2 v2 -> v3: - v2 can be found at [3] - Sorted out part of the issues flagged by 0day testing in patches 1/3 and 3/3. - This version is based on v5.10-rc2. RESEND v2: - Rebased and retested on v5.10-rc1. v1 -> v2: - v1 can be found at [2] - The previous patch 1/4 was removed and a get_cpu_with_amu_feat() function was introduced instead, in 3/3, as suggested by Catalin. Given that most checks for the presence of AMUs is done at CPU level, followed by other validation, this implementation works better than the one initially introduced in v1/->patch 1/4. - Fixed warning reported by 0-day kernel test robot. - All build tests and FVP tests at [2] were re-run for this version. - This version is based on linux-next/20201001. [1] https://documentation-service.arm.com/static/5f106ad60daa596235e80081 [2] https://lore.kernel.org/lkml/20200826130309.28027-1-ionela.voinescu@arm.com/ [3] https://lore.kernel.org/linux-arm-kernel/20201027163624.20747-1-ionela.voinescu@arm.com/ [4] https://lore.kernel.org/linux-arm-kernel/20201105122702.13916-1-ionela.voinescu@arm.com/ Thank you, Ionela. Ionela Voinescu (3): arm64: wrap and generalise counter read functions arm64: split counter validation function arm64: implement CPPC FFH support using AMUs arch/arm64/include/asm/cpufeature.h | 8 ++ arch/arm64/include/asm/topology.h | 4 +- arch/arm64/kernel/cpufeature.c | 13 ++- arch/arm64/kernel/topology.c | 129 ++++++++++++++++++++++------ 4 files changed, 124 insertions(+), 30 deletions(-)