mbox series

[v2,00/24] Opt-in always-on nVHE hypervisor

Message ID 20201116204318.63987-1-dbrazdil@google.com (mailing list archive)
Headers show
Series Opt-in always-on nVHE hypervisor | expand

Message

David Brazdil Nov. 16, 2020, 8:42 p.m. UTC
As we progress towards being able to keep guest state private to the
host running nVHE hypervisor, this series allows the hypervisor to
install itself on newly booted CPUs before the host is allowed to run
on them.

All functionality described below is opt-in, guarded by an early param
'kvm-arm.protected'. Future patches specific to the new "protected" mode
should be hidden behind the same param.

The hypervisor starts trapping host SMCs and intercepting host's PSCI
CPU_ON/SUSPEND calls. It replaces the host's entry point with its own,
initializes the EL2 state of the new CPU and installs the nVHE hyp vector
before ERETing to the host's entry point.

The kernel checks new cores' features against the finalized system
capabilities. To avoid the need to move this code/data to EL2, the
implementation only allows to boot cores that were online at the time of
KVM initialization and therefore had been checked already.

Other PSCI SMCs are forwarded to EL3, though only the known set of SMCs
implemented in the kernel is allowed. Non-PSCI SMCs are also forwarded
to EL3. Future changes will need to ensure the safety of all SMCs wrt.
private guests.

The host is still allowed to reset EL2 back to the stub vector, eg. for
hibernation or kexec, but will not disable nVHE when there are no VMs.

Tested on Rock Pi 4b, based on 5.10-rc4.

changes since v1:
  * early param sets a capability instead of a static key
  * assume SMCCC v1.2 for host SMC forwarding
  * fix reserved SMC ID range for PSCI
  * split init_el2_state into smaller macros, move to el2_setup.h
  * many small cleanups

changes since RFC:
  * add early param to make features opt-in
  * simplify CPU_ON/SUSPEND implementation
  * replace spinlocks with CAS atomic
  * make cpu_logical_map ro_after_init

David Brazdil (24):
  psci: Support psci_ops.get_version for v0.1
  psci: Accessor for configured PSCI function IDs
  arm64: Make cpu_logical_map() take unsigned int
  arm64: Move MAIR_EL1_SET to asm/memory.h
  kvm: arm64: Initialize MAIR_EL2 using a constant
  kvm: arm64: Move hyp-init params to a per-CPU struct
  kvm: arm64: Refactor handle_trap to use a switch
  kvm: arm64: Add SMC handler in nVHE EL2
  kvm: arm64: Add .hyp.data..ro_after_init ELF section
  kvm: arm64: Support per_cpu_ptr in nVHE hyp code
  kvm: arm64: Create nVHE copy of cpu_logical_map
  kvm: arm64: Bootstrap PSCI SMC handler in nVHE EL2
  kvm: arm64: Add offset for hyp VA <-> PA conversion
  kvm: arm64: Forward safe PSCI SMCs coming from host
  kvm: arm64: Extract parts of el2_setup into a macro
  kvm: arm64: Extract __do_hyp_init into a helper function
  kvm: arm64: Add CPU entry point in nVHE hyp
  kvm: arm64: Add function to enter host from KVM nVHE hyp code
  kvm: arm64: Intercept host's PSCI_CPU_ON SMCs
  kvm: arm64: Intercept host's CPU_SUSPEND PSCI SMCs
  kvm: arm64: Add kvm-arm.protected early kernel parameter
  kvm: arm64: Keep nVHE EL2 vector installed
  kvm: arm64: Trap host SMCs in protected mode.
  kvm: arm64: Fix EL2 mode availability checks

 arch/arm64/include/asm/cpucaps.h     |   3 +-
 arch/arm64/include/asm/el2_setup.h   | 185 +++++++++++++++++
 arch/arm64/include/asm/kvm_arm.h     |   1 +
 arch/arm64/include/asm/kvm_asm.h     |  16 +-
 arch/arm64/include/asm/kvm_hyp.h     |   8 +
 arch/arm64/include/asm/memory.h      |  29 ++-
 arch/arm64/include/asm/percpu.h      |   6 +
 arch/arm64/include/asm/sections.h    |   1 +
 arch/arm64/include/asm/smp.h         |   4 +-
 arch/arm64/include/asm/sysreg.h      |  30 +++
 arch/arm64/include/asm/virt.h        |  26 +++
 arch/arm64/kernel/asm-offsets.c      |   5 +
 arch/arm64/kernel/cpufeature.c       |  29 +++
 arch/arm64/kernel/head.S             | 144 ++-----------
 arch/arm64/kernel/image-vars.h       |   3 +
 arch/arm64/kernel/setup.c            |   2 +-
 arch/arm64/kernel/vmlinux.lds.S      |  10 +
 arch/arm64/kvm/arm.c                 |  94 +++++++--
 arch/arm64/kvm/hyp/nvhe/Makefile     |   3 +-
 arch/arm64/kvm/hyp/nvhe/host.S       |  47 +++++
 arch/arm64/kvm/hyp/nvhe/hyp-init.S   |  90 +++++++--
 arch/arm64/kvm/hyp/nvhe/hyp-main.c   |  47 ++++-
 arch/arm64/kvm/hyp/nvhe/hyp-smp.c    |  40 ++++
 arch/arm64/kvm/hyp/nvhe/hyp.lds.S    |   1 +
 arch/arm64/kvm/hyp/nvhe/psci-relay.c | 289 +++++++++++++++++++++++++++
 arch/arm64/kvm/hyp/nvhe/switch.c     |   5 +-
 arch/arm64/kvm/va_layout.c           |  30 ++-
 arch/arm64/mm/proc.S                 |  15 +-
 drivers/firmware/psci/psci.c         |  21 +-
 include/linux/psci.h                 |  10 +
 30 files changed, 977 insertions(+), 217 deletions(-)
 create mode 100644 arch/arm64/include/asm/el2_setup.h
 create mode 100644 arch/arm64/kvm/hyp/nvhe/hyp-smp.c
 create mode 100644 arch/arm64/kvm/hyp/nvhe/psci-relay.c

--
2.29.2.299.gdc1121823c-goog

Comments

Marc Zyngier Nov. 23, 2020, 1:44 p.m. UTC | #1
On Mon, 16 Nov 2020 20:42:54 +0000,
David Brazdil <dbrazdil@google.com> wrote:
> 
> As we progress towards being able to keep guest state private to the
> host running nVHE hypervisor, this series allows the hypervisor to
> install itself on newly booted CPUs before the host is allowed to run
> on them.
> 
> All functionality described below is opt-in, guarded by an early param
> 'kvm-arm.protected'. Future patches specific to the new "protected" mode
> should be hidden behind the same param.
> 
> The hypervisor starts trapping host SMCs and intercepting host's PSCI
> CPU_ON/SUSPEND calls. It replaces the host's entry point with its own,
> initializes the EL2 state of the new CPU and installs the nVHE hyp vector
> before ERETing to the host's entry point.
> 
> The kernel checks new cores' features against the finalized system
> capabilities. To avoid the need to move this code/data to EL2, the
> implementation only allows to boot cores that were online at the time of
> KVM initialization and therefore had been checked already.
> 
> Other PSCI SMCs are forwarded to EL3, though only the known set of SMCs
> implemented in the kernel is allowed. Non-PSCI SMCs are also forwarded
> to EL3. Future changes will need to ensure the safety of all SMCs wrt.
> private guests.
> 
> The host is still allowed to reset EL2 back to the stub vector, eg. for
> hibernation or kexec, but will not disable nVHE when there are no VMs.
> 
> Tested on Rock Pi 4b, based on 5.10-rc4.

Adding Lorenzo and Sudeep for the PSCI side of things.

Thanks,

	M.
Marc Zyngier Nov. 23, 2020, 6:01 p.m. UTC | #2
Hi David,

On Mon, 16 Nov 2020 20:42:54 +0000,
David Brazdil <dbrazdil@google.com> wrote:
> 
> As we progress towards being able to keep guest state private to the
> host running nVHE hypervisor, this series allows the hypervisor to
> install itself on newly booted CPUs before the host is allowed to run
> on them.
> 
> All functionality described below is opt-in, guarded by an early param
> 'kvm-arm.protected'. Future patches specific to the new "protected" mode
> should be hidden behind the same param.
> 
> The hypervisor starts trapping host SMCs and intercepting host's PSCI
> CPU_ON/SUSPEND calls. It replaces the host's entry point with its own,
> initializes the EL2 state of the new CPU and installs the nVHE hyp vector
> before ERETing to the host's entry point.
> 
> The kernel checks new cores' features against the finalized system
> capabilities. To avoid the need to move this code/data to EL2, the
> implementation only allows to boot cores that were online at the time of
> KVM initialization and therefore had been checked already.
> 
> Other PSCI SMCs are forwarded to EL3, though only the known set of SMCs
> implemented in the kernel is allowed. Non-PSCI SMCs are also forwarded
> to EL3. Future changes will need to ensure the safety of all SMCs wrt.
> private guests.
> 
> The host is still allowed to reset EL2 back to the stub vector, eg. for
> hibernation or kexec, but will not disable nVHE when there are no VMs.

I have now been through the whole series, and I don't think there is
anything really major (although I haven't tried it yet).

I think it would benefit from being rebased on top of kvmarm/queue, as
it'd give you the opportunity to replace a number of per-CPU state
fields with global function pointers. Another thing is that we seem to
have diverging interpretations of the PSCI spec when it comes to
CPU_SUSPEND.

Finally, please include the PSCI maintainers in your next posting, as
I'll need their Ack to pick the first few patches.

Thanks,

	M.