From patchwork Mon Dec 21 15:06:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tretter X-Patchwork-Id: 11984727 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D045BC433E0 for ; Mon, 21 Dec 2020 15:08:31 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9683C22C7B for ; Mon, 21 Dec 2020 15:08:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9683C22C7B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=YUX4/oNZglMSjQRvlEMsvOhXHyYeN9YBGQxGIIE+HjM=; b=mRayDua4T7g7p47OxoXsJgWc/4 Zw94vhPZZfN7qgbC/5ZIdBQ6pssZE3QH/nuwo6mbYVN4iWWCqjtsVcHXnaoE6bIIkbNKlK6orS7YX Ubr3N+THHCJwjBRDGt26RqHjGvXyHIiDAWoScyO3nkXySrCowUGDMFgFpXfYRO5nSgsNuYaooKWxj b5CVdjYfBWAtQMviwe1cWyYPfjcPVuvG/I90t3FIvsdwugOtVO/mnAXeeww+BkqCLxKQ3r9nkgfBX EaS8YE7dgghAgIBFL4Ja1yz+WiufaBAQzSllaCPkm4cl/GCbbmkDRew/IMmfzQ3gC+pJixd6TMJFS JJ1RL80w==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1krMmE-0008SC-OY; Mon, 21 Dec 2020 15:07:10 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1krMli-0008HE-Mw for linux-arm-kernel@lists.infradead.org; Mon, 21 Dec 2020 15:06:42 +0000 Received: from [2a0a:edc0:0:1101:1d::39] (helo=dude03.red.stw.pengutronix.de) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1krMlg-0007Vk-AC; Mon, 21 Dec 2020 16:06:36 +0100 Received: from mtr by dude03.red.stw.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1krMle-003Aay-N4; Mon, 21 Dec 2020 16:06:34 +0100 From: Michael Tretter To: linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: [PATCH v2 00/15] soc: xilinx: vcu: Convert driver to clock provider Date: Mon, 21 Dec 2020 16:06:19 +0100 Message-Id: <20201221150634.755673-1-m.tretter@pengutronix.de> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::39 X-SA-Exim-Mail-From: mtr@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201221_100639_202708_6C727897 X-CRM114-Status: GOOD ( 20.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dshah@xilinx.com, tejasp@xilinx.com, sboyd@kernel.org, mturquette@baylibre.com, rajanv@xilinx.com, michals@xilinx.com, kernel@pengutronix.de, rvisaval@xilinx.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello, the xlnx_vcu soc driver is actually a clock provider of a PLL and four output clocks created from the PLL via dividers. This is v2 of the series to transform the driver into a proper clock provider driver. The main changes compared to v1 are: Get rid of the "dummy" clock and remove the manual switching of the mux in the output clocks. The driver now uses the pll_ref as a bypass clock. As this is not documented, I am not sure if this is actually the case, but without another signal for an external clock to the ip core, this seems plausible and avoids changes to the device tree binding. The reparenting happens automatically when setting a rate on the output clocks. Add a few patches to cleanup checkpatch warnings on the driver itself. Move the entire driver from drivers/soc to drivers/clk, because the driver is now actually only clock provider driver. A more detailed changelog is attached to the respective patches. The series is based on the zynqmp/soc-next branch in the Xilinx downstream repository [0] which should be merged to mainline soon. Michael [0] https://github.com/Xilinx/linux-xlnx/tree/zynqmp/soc-next Changelog: v2: - Remove dummy clock and explicit re-parenting of mux clocks - Add patches to fix checkpatch warnings - Move driver from drivers/soc to drivers/clk - Use clk_parent_data instead of parent_names - Add missing decoder clocks - Fix smatch warnings - Fix kernel-doc Michael Tretter (15): ARM: dts: vcu: define indexes for output clocks clk: divider: fix initialization with parent_hw soc: xilinx: vcu: drop coreclk from struct xlnx_vcu soc: xilinx: vcu: add helper to wait for PLL locked soc: xilinx: vcu: add helpers for configuring PLL soc: xilinx: vcu: implement PLL disable soc: xilinx: vcu: register PLL as fixed rate clock soc: xilinx: vcu: implement clock provider for output clocks soc: xilinx: vcu: make pll post divider explicit soc: xilinx: vcu: make the PLL configurable soc: xilinx: vcu: remove calculation of PLL configuration soc: xilinx: vcu: use bitfields for register definition soc: xilinx: vcu: fix repeated word the in comment soc: xilinx: vcu: fix alignment to open parenthesis clk: xilinx: move xlnx_vcu clock driver from soc drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/clk-divider.c | 9 +- drivers/clk/xilinx/Kconfig | 19 + drivers/clk/xilinx/Makefile | 2 + drivers/clk/xilinx/xlnx_vcu.c | 742 +++++++++++++++++++++++++++ drivers/soc/xilinx/Kconfig | 17 - drivers/soc/xilinx/Makefile | 1 - drivers/soc/xilinx/xlnx_vcu.c | 628 ----------------------- include/dt-bindings/clock/xlnx-vcu.h | 15 + 10 files changed, 787 insertions(+), 648 deletions(-) create mode 100644 drivers/clk/xilinx/Kconfig create mode 100644 drivers/clk/xilinx/Makefile create mode 100644 drivers/clk/xilinx/xlnx_vcu.c delete mode 100644 drivers/soc/xilinx/xlnx_vcu.c create mode 100644 include/dt-bindings/clock/xlnx-vcu.h Acked-by: Michal Simek