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Wed, 20 Jan 2021 09:17:48 -0800 (PST) X-Google-Smtp-Source: ABdhPJxGKhN/2NYR2T81zX9s+0t8pvkyuYr5imMnERQIJpptWc9hpg0Dlvkm1YAcD3S5poubpx+etw== X-Received: by 2002:a1c:10c:: with SMTP id 12mr5360373wmb.186.1611163067945; Wed, 20 Jan 2021 09:17:47 -0800 (PST) Received: from redfedo.redhat.com ([2a01:cb14:499:3d00:cd47:f651:9d80:157a]) by smtp.gmail.com with ESMTPSA id o124sm5444077wmb.5.2021.01.20.09.17.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jan 2021 09:17:47 -0800 (PST) From: Julien Thierry To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 0/5] arm64: Prepare instruction decoder for objtool Date: Wed, 20 Jan 2021 18:17:40 +0100 Message-Id: <20210120171745.1657762-1-jthierry@redhat.com> X-Mailer: git-send-email 2.25.4 MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=jthierry@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210120_121752_719811_B04212D5 X-CRM114-Status: GOOD ( 12.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, catalin.marinas@arm.com, broonie@kernel.org, will@kernel.org, Julien Thierry Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org To support arm64, objtool will need to be able to decode aarch64 instructions. This patch series adds some instruction definitions needed by objtool and moves out encoding/decoding functionalities that do not rely on kernel code in order. I'll post the start of the arm64 objtool backend shortly. Thanks, Julien --> Julien Thierry (5): arm64: Move instruction encoder/decoder under lib/ arm64: aarch64-insn: Add SVE instruction class arm64: aarch64-insn: Add barrier encodings arm64: aarch64-insn: Add some opcodes to instruction decoder arm64: Add load/store decoding helpers arch/arm64/include/asm/aarch64-insn.h | 552 +++++++ arch/arm64/include/asm/alternative-macros.h | 3 - arch/arm64/include/asm/alternative.h | 1 + arch/arm64/include/asm/debug-monitors.h | 14 +- arch/arm64/include/asm/ftrace.h | 2 +- arch/arm64/include/asm/insn.h | 476 ------- arch/arm64/include/asm/jump_label.h | 2 +- arch/arm64/include/asm/uprobes.h | 2 +- arch/arm64/kernel/insn.c | 1416 +----------------- arch/arm64/lib/Makefile | 2 +- arch/arm64/lib/aarch64-insn.c | 1426 +++++++++++++++++++ 11 files changed, 1985 insertions(+), 1911 deletions(-) create mode 100644 arch/arm64/include/asm/aarch64-insn.h create mode 100644 arch/arm64/lib/aarch64-insn.c --- 2.25.4