| Message ID | 20210211052206.2955988-1-daniel@0x0f.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | ARM: mstar: Basic MPLL support | expand |
Hi Arnd and Olof, On Thu, 11 Feb 2021 at 14:22, Daniel Palmer <daniel@0x0f.com> wrote: > Daniel Palmer (7): > dt-bindings: clk: mstar msc313 mpll binding header > dt-bindings: clk: mstar msc313 mpll binding description > clk: fixed: add devm helper for clk_hw_register_fixed_factor() > clk: mstar: MStar/SigmaStar MPLL driver > ARM: mstar: Select MSTAR_MSC313_MPLL > ARM: mstar: Add the external clocks to the base dsti > ARM: mstar: Add mpll to base dtsi The first four patches have now been merged. I forgot to send these to the soc patchwork so I think the last 3 didn't show up on your radar.. What do I need to do to get the last 3 merged? Thanks, Daniel
On Tue, Feb 23, 2021 at 2:44 AM Daniel Palmer <daniel@0x0f.com> wrote: > > On Thu, 11 Feb 2021 at 14:22, Daniel Palmer <daniel@0x0f.com> wrote: > > Daniel Palmer (7): > > dt-bindings: clk: mstar msc313 mpll binding header > > dt-bindings: clk: mstar msc313 mpll binding description > > clk: fixed: add devm helper for clk_hw_register_fixed_factor() > > clk: mstar: MStar/SigmaStar MPLL driver > > ARM: mstar: Select MSTAR_MSC313_MPLL > > ARM: mstar: Add the external clocks to the base dsti > > ARM: mstar: Add mpll to base dtsi > > The first four patches have now been merged. > I forgot to send these to the soc patchwork so I think the last 3 > didn't show up on your radar.. > What do I need to do to get the last 3 merged? Let's merge them for the next merge window, please send them after -rc1 is out. Arnd
This series adds support for the MPLL block that is present in MStar/SigmaStar ARMv7 SoCs. This block is intended to be set and forgotten about before Linux is running so all it actually does it read the registers and calculate what the output frequencies should be. We only care about this block because there are upstream dividers, gates, muxes etc that need something between the input crystal and themselves to calculate their own rates. Changes since v1: - The clock output name related parts of the binding description are gone. Clock names are generated inside the driver. I dropped Rob's reviewed-by because of these changes. - A devm helper has been added for clk_hw_register_fixed_factor() to allow drivers to register multiple fixed factor clks without having to handle all of the clean up. - Numerous clean ups to the mpll driver itself based on Stephen's feedback. Daniel Palmer (7): dt-bindings: clk: mstar msc313 mpll binding header dt-bindings: clk: mstar msc313 mpll binding description clk: fixed: add devm helper for clk_hw_register_fixed_factor() clk: mstar: MStar/SigmaStar MPLL driver ARM: mstar: Select MSTAR_MSC313_MPLL ARM: mstar: Add the external clocks to the base dsti ARM: mstar: Add mpll to base dtsi .../bindings/clock/mstar,msc313-mpll.yaml | 46 ++++++ MAINTAINERS | 3 + arch/arm/boot/dts/mstar-v7.dtsi | 23 +++ arch/arm/mach-mstar/Kconfig | 1 + drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/clk-fixed-factor.c | 39 ++++- drivers/clk/mstar/Kconfig | 5 + drivers/clk/mstar/Makefile | 6 + drivers/clk/mstar/clk-msc313-mpll.c | 155 ++++++++++++++++++ include/dt-bindings/clock/mstar-msc313-mpll.h | 19 +++ include/linux/clk-provider.h | 4 +- 12 files changed, 296 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml create mode 100644 drivers/clk/mstar/Kconfig create mode 100644 drivers/clk/mstar/Makefile create mode 100644 drivers/clk/mstar/clk-msc313-mpll.c create mode 100644 include/dt-bindings/clock/mstar-msc313-mpll.h