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Wed, 12 May 2021 10:01:18 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Wed, 12 May 2021 10:01:17 -0500 Received: from a0393678-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 14CF19F7119262; Wed, 12 May 2021 10:01:11 -0500 From: Kishon Vijay Abraham I To: Nishanth Menon , Tero Kristo , Rob Herring CC: , , , Kishon Vijay Abraham I , Lokesh Vutla , Subject: [PATCH 0/5] AM64: EVM/SK: Enable PCIe and USB Date: Wed, 12 May 2021 20:31:02 +0530 Message-ID: <20210512150107.26793-1-kishon@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210512_080123_859137_B00FB091 X-CRM114-Status: UNSURE ( 6.89 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org AM642 EVM has one PCIe slot and AM642 SK has one USB slot. AM64 SoC has one SERDES module which can be used by either PCIe or USB. Add DT nodes to represent and enable SERDES/PCIe/USB modules in EVM/SK. Kishon Vijay Abraham I (5): arm64: dts: ti: k3-am64-main: Add SERDES DT node arm64: dts: ti: k3-am64-main: Add PCIe DT node arm64: dts: ti: k3-am642-evm: Enable PCIe and SERDES arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port arm64: dts: ti: k3-am642-sk: Disable PCIe arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 102 +++++++++++++++++++++++ arch/arm64/boot/dts/ti/k3-am642-evm.dts | 30 +++++++ arch/arm64/boot/dts/ti/k3-am642-sk.dts | 47 +++++++++++ 3 files changed, 179 insertions(+)