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[73.25.156.94]) by smtp.gmail.com with ESMTPSA id fs24sm9228104pjb.6.2021.06.01.15.43.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Jun 2021 15:43:55 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Subject: [PATCH v4 0/6] iommu/arm-smmu: adreno-smmu page fault handling Date: Tue, 1 Jun 2021 15:47:18 -0700 Message-Id: <20210601224750.513996-1-robdclark@gmail.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210601_154358_392064_D3DB43CC X-CRM114-Status: GOOD ( 15.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Konrad Dybcio , Akhil P Oommen , Bjorn Andersson , Eric Anholt , Iskren Chernev , Laurent Pinchart , AngeloGioacchino Del Regno , Marijn Suijten , Lee Jones , =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= , Rob Clark , Sai Prakash Ranjan , Jonathan Marek , Will Deacon , Zhenzhong Duan , Qinglang Miao , Dave Airlie , Joerg Roedel , "open list:DRM DRIVER FOR MSM ADRENO GPU" , Sharat Masetty , Abhinav Kumar , Stephen Boyd , Maxime Ripard , Kalyan Thota , Jordan Crouse , "moderated list:ARM SMMU DRIVERS" , Robin Murphy , Douglas Anderson , open list , "open list:IOMMU DRIVERS" , "Kristian H. Kristensen" , Thomas Zimmermann , "open list:DRM DRIVER FOR MSM ADRENO GPU" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Rob Clark This picks up an earlier series[1] from Jordan, and adds additional support needed to generate GPU devcore dumps on iova faults. Original description: This is a stack to add an Adreno GPU specific handler for pagefaults. The first patch starts by wiring up report_iommu_fault for arm-smmu. The next patch adds a adreno-smmu-priv function hook to capture a handful of important debugging registers such as TTBR0, CONTEXTIDR, FSYNR0 and others. This is used by the third patch to print more detailed information on page fault such as the TTBR0 for the pagetable that caused the fault and the source of the fault as determined by a combination of the FSYNR1 register and an internal GPU register. This code provides a solid base that we can expand on later for even more extensive GPU side page fault debugging capabilities. v4: [Rob] Add support to stall SMMU on fault, and let the GPU driver resume translation after it has had a chance to snapshot the GPUs state v3: Always clear FSR even if the target driver is going to handle resume v2: Fix comment wording and function pointer check per Rob Clark [1] https://lore.kernel.org/dri-devel/20210225175135.91922-1-jcrouse@codeaurora.org/ Jordan Crouse (3): iommu/arm-smmu: Add support for driver IOMMU fault handlers iommu/arm-smmu-qcom: Add an adreno-smmu-priv callback to get pagefault info drm/msm: Improve the a6xx page fault handler Rob Clark (3): iommu/arm-smmu-qcom: Add stall support drm/msm: Add crashdump support for stalled SMMU drm/msm: devcoredump iommu fault support drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 9 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 101 +++++++++++++++++++- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 2 +- drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 43 +++++++-- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 15 +++ drivers/gpu/drm/msm/msm_debugfs.c | 2 +- drivers/gpu/drm/msm/msm_gem.h | 1 + drivers/gpu/drm/msm/msm_gem_submit.c | 1 + drivers/gpu/drm/msm/msm_gpu.c | 55 ++++++++++- drivers/gpu/drm/msm/msm_gpu.h | 19 +++- drivers/gpu/drm/msm/msm_gpummu.c | 5 + drivers/gpu/drm/msm/msm_iommu.c | 22 ++++- drivers/gpu/drm/msm/msm_mmu.h | 5 +- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 50 ++++++++++ drivers/iommu/arm/arm-smmu/arm-smmu.c | 9 +- drivers/iommu/arm/arm-smmu/arm-smmu.h | 2 + include/linux/adreno-smmu-priv.h | 38 +++++++- 20 files changed, 354 insertions(+), 31 deletions(-)