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Sun, 04 Jul 2021 20:41:09 -0700 Received: from MTKMBS07N2.mediatek.inc (172.21.101.141) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 4 Jul 2021 20:41:07 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 5 Jul 2021 11:41:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 5 Jul 2021 11:41:05 +0800 From: Chun-Jie Chen To: Matthias Brugger , Stephen Boyd , Nicolas Boichat , Rob Herring CC: , , , , , , Subject: [v12 00/20] Mediatek MT8192 clock support Date: Mon, 5 Jul 2021 11:38:04 +0800 Message-ID: <20210705033824.1934-1-chun-jie.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210704_204114_993121_5D278B13 X-CRM114-Status: GOOD ( 15.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org this patch series is based on 5.13-rc3. changes since v11: - move mmsys binding to "mediatek,mmsys.txt" (patch 2) - fix new DT binding error (patch 1) change since v10: - refine binding document in patch 1 (drop the 'oneOf') change since v9: - combine similiar dt-binding file for system and functional clock - change api of getting regmap if it's not a syscon node (patch 3) change since v8: - fix mm dt-binding file conflict. reason for sending v8: - due to this patch series including dt-binding file, so add device tree reviewer to mail list, no change between [1] and v8. [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=454523 reason for resending v7: - add review history from series below [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=405295 change since v6: - update from series below [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=405295 - fix DT bindings fail - fix checkpatch warning - update mux ops without gate control change since v5: - remove unused clocks by rolling Tinghan's patches[1][2] into series [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=398781 [2] https://patchwork.kernel.org/project/linux-mediatek/list/?series=405143 - remove dts related patches from series change since v4: - merge some subsystem into same driver - add a generic probe function to reduce duplicated code changes since v3: - add critical clocks - split large patches into small ones changes since v2: - update and split dt-binding documents by functionalities - add error checking in probe() function - fix incorrect clock relation and add critical clocks - update license identifier and minor fix of coding style changes since v1: - fix asymmetrical control of PLL - have en_mask used as divider enable mask on all MediaTek SoC Chun-Jie Chen (20): dt-bindings: ARM: Mediatek: Add new document bindings of MT8192 clock dt-bindings: ARM: Mediatek: Add mmsys document binding for MT8192 clk: mediatek: Add dt-bindings of MT8192 clocks clk: mediatek: Get regmap without syscon compatible check clk: mediatek: Fix asymmetrical PLL enable and disable control clk: mediatek: Add configurable enable control to mtk_pll_data clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers clk: mediatek: Add MT8192 basic clocks support clk: mediatek: Add MT8192 audio clock support clk: mediatek: Add MT8192 camsys clock support clk: mediatek: Add MT8192 imgsys clock support clk: mediatek: Add MT8192 imp i2c wrapper clock support clk: mediatek: Add MT8192 ipesys clock support clk: mediatek: Add MT8192 mdpsys clock support clk: mediatek: Add MT8192 mfgcfg clock support clk: mediatek: Add MT8192 mmsys clock support clk: mediatek: Add MT8192 msdc clock support clk: mediatek: Add MT8192 scp adsp clock support clk: mediatek: Add MT8192 vdecsys clock support clk: mediatek: Add MT8192 vencsys clock support .../bindings/arm/mediatek/mediatek,mmsys.txt | 1 + .../arm/mediatek/mediatek,mt8192-clock.yaml | 207 +++ .../mediatek/mediatek,mt8192-sys-clock.yaml | 65 + drivers/clk/mediatek/Kconfig | 80 + drivers/clk/mediatek/Makefile | 13 + drivers/clk/mediatek/clk-cpumux.c | 2 +- drivers/clk/mediatek/clk-mt8192-aud.c | 118 ++ drivers/clk/mediatek/clk-mt8192-cam.c | 107 ++ drivers/clk/mediatek/clk-mt8192-img.c | 70 + .../clk/mediatek/clk-mt8192-imp_iic_wrap.c | 119 ++ drivers/clk/mediatek/clk-mt8192-ipe.c | 57 + drivers/clk/mediatek/clk-mt8192-mdp.c | 82 + drivers/clk/mediatek/clk-mt8192-mfg.c | 50 + drivers/clk/mediatek/clk-mt8192-mm.c | 108 ++ drivers/clk/mediatek/clk-mt8192-msdc.c | 85 ++ drivers/clk/mediatek/clk-mt8192-scp_adsp.c | 50 + drivers/clk/mediatek/clk-mt8192-vdec.c | 94 ++ drivers/clk/mediatek/clk-mt8192-venc.c | 53 + drivers/clk/mediatek/clk-mt8192.c | 1326 +++++++++++++++++ drivers/clk/mediatek/clk-mtk.c | 25 +- drivers/clk/mediatek/clk-mtk.h | 28 +- drivers/clk/mediatek/clk-mux.c | 11 +- drivers/clk/mediatek/clk-mux.h | 18 +- drivers/clk/mediatek/clk-pll.c | 31 +- drivers/clk/mediatek/reset.c | 2 +- include/dt-bindings/clock/mt8192-clk.h | 585 ++++++++ 26 files changed, 3363 insertions(+), 24 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml create mode 100644 drivers/clk/mediatek/clk-mt8192-aud.c create mode 100644 drivers/clk/mediatek/clk-mt8192-cam.c create mode 100644 drivers/clk/mediatek/clk-mt8192-img.c create mode 100644 drivers/clk/mediatek/clk-mt8192-imp_iic_wrap.c create mode 100644 drivers/clk/mediatek/clk-mt8192-ipe.c create mode 100644 drivers/clk/mediatek/clk-mt8192-mdp.c create mode 100644 drivers/clk/mediatek/clk-mt8192-mfg.c create mode 100644 drivers/clk/mediatek/clk-mt8192-mm.c create mode 100644 drivers/clk/mediatek/clk-mt8192-msdc.c create mode 100644 drivers/clk/mediatek/clk-mt8192-scp_adsp.c create mode 100644 drivers/clk/mediatek/clk-mt8192-vdec.c create mode 100644 drivers/clk/mediatek/clk-mt8192-venc.c create mode 100644 drivers/clk/mediatek/clk-mt8192.c create mode 100644 include/dt-bindings/clock/mt8192-clk.h