From patchwork Thu Aug 19 02:23:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 12445851 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9AE71C4338F for ; Thu, 19 Aug 2021 02:29:43 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6940A610FF for ; Thu, 19 Aug 2021 02:29:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 6940A610FF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=oMiuDK82mK7h39sEi3mwTPesNw0Cby/kzitCKsKlXsg=; b=Lr/+bQxhDYpa20 OhjJkPojN5ArmgM5/Gv8fLVBS9K7KTfv5e+30G4UFRZsNMAUTl457cSAVnIYO2rnMZbNy3nBIeJim eKW4QQN8gS8e4uW4D0qcBgZ/IpgoenzyqF7T09oLeOC9M/hcdHeRZ2Z0llI/qitRiDbnmgwM4kTqA xhiiooSFTeWAopu1ZF2sPTU/iiIPYux4YKuUkqYl//ZQ5lOpxqVPeUFtN42UKX0/q2cgFjkj9H59l 9Icm5uiCMDNkNF11mwdzemjFPCgqSStfWqGerXEofRU5TzPnl3AJkTFQIVDgzxCe4UxZvSBNN/YER wj5CyJl/ip3sBPNL6OZg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mGXlm-0071KL-1e; Thu, 19 Aug 2021 02:27:02 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mGXin-006zri-C7; Thu, 19 Aug 2021 02:24:01 +0000 X-UUID: 5b65dde865224551b8ab63f90430e652-20210818 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=x+uDg17tFCODywfggeAZyjp+8tzLX3fXuOW/gXN9YKI=; b=qe1r+fWKQkTMjcYIw75dzmg4gzapMTfTX0lGIp+ZhE5HiR1xlzPe+TZMJsgB48DMynYCJX3Ms89S8KL8RrdS5YSS78Xw5YGuwebFUnbkrE9FoWU7fdVcRrMiUQjmMfO8FArbFYAiFh5+9+gebscISoV6pnj9r+0L73P8STzNDFI=; X-UUID: 5b65dde865224551b8ab63f90430e652-20210818 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 263704949; Wed, 18 Aug 2021 19:23:47 -0700 Received: from mtkmbs05n2.mediatek.inc (172.21.101.140) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 18 Aug 2021 19:23:46 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 19 Aug 2021 10:23:44 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 19 Aug 2021 10:23:44 +0800 From: jason-jh.lin To: Rob Herring , Matthias Brugger , Chun-Kuang Hu , CC: Philipp Zabel , Enric Balletbo i Serra , David Airlie , "Daniel Vetter" , Fabien Parent , , "jason-jh . lin" , Yongqiang Niu , Jitao shi , , , , , , , Subject: [PATCH v8 00/13] Add Mediatek Soc DRM (vdosys0) support for mt8195 Date: Thu, 19 Aug 2021 10:23:14 +0800 Message-ID: <20210819022327.13040-1-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210818_192357_511571_1D1A353C X-CRM114-Status: GOOD ( 16.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Change in v8: - add DP_INTF0 mux into mmsys routing table - add DP_INTF0 mutex mod and enum into add/remove comp funtion - remove bypass DSC enum in mtk_ddp_comp_init Change in v7: - add dt=binding of mmsys and disp path into this series - separate th modidfication of alphabetic order, remove unused define and rename the define of register offset to individual patch - add comment for MERGE ultra and preultra setting Change in v6: - adjust alphabetic order for mediatek-drm - move the patch that add mt8195 support for mediatek-drm as the lastest patch - add MERGE define for const varriable Change in v5: - add power-domain property into vdosys0 and vdosys1 dts node. - add MT8195 prifix and remove unused VDO1 define in mt8195-mmsys.h Change in v4: - extract dt-binding patches to another patch series https://patchwork.kernel.org/project/linux-mediatek/list/?series=519597 - squash DSC module into mtk_drm_ddp_comp.c - add coment and simplify MERGE config function Change in v3: - change mmsys and display dt-bindings document from txt to yaml - add MERGE additional description in display dt-bindings document - fix mboxes-cells number of vdosys0 node in dts - drop mutex eof convert define - remove pm_runtime apis in DSC and MERGE - change DSC and MERGE enum to alphabetic order Change in v2: - add DSC yaml file - add mt8195 drm driver porting parts in to one patch - remove useless define, variable, structure member and function - simplify DSC and MERGE file and switch threre order jason-jh.lin (13): dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding dt-bindings: mediatek: display: split each block to individual yaml dt-bindings: mediatek: add mediatek,dsc.yaml for mt8195 SoC binding dt-bindings: mediatek: display: add mt8195 SoC binding arm64: dts: mt8195: add display node for vdosys0 soc: mediatek: add mtk-mmsys support for mt8195 vdosys0 soc: mediatek: add mtk-mutex support for mt8195 vdosys0 drm/mediatek: remove unused define in mtk_drm_ddp_comp.c drm/mediatek: rename the define of register offset drm/mediatek: adjust to the alphabetic order for mediatek-drm drm/mediatek: add DSC support for mediatek-drm drm/mediatek: add MERGE support for mediatek-drm drm/mediatek: add mediatek-drm of vdosys0 support for mt8195 .../bindings/arm/mediatek/mediatek,mmsys.yaml | 8 + .../display/mediatek/mediatek,aal.yaml | 76 +++++ .../display/mediatek/mediatek,ccorr.yaml | 74 +++++ .../display/mediatek/mediatek,color.yaml | 85 ++++++ .../display/mediatek/mediatek,disp.txt | 219 -------------- .../display/mediatek/mediatek,dither.yaml | 75 +++++ .../display/mediatek/mediatek,dsc.yaml | 69 +++++ .../display/mediatek/mediatek,gamma.yaml | 76 +++++ .../display/mediatek/mediatek,merge.yaml | 97 +++++++ .../display/mediatek/mediatek,mutex.yaml | 79 ++++++ .../display/mediatek/mediatek,od.yaml | 52 ++++ .../display/mediatek/mediatek,ovl-2l.yaml | 86 ++++++ .../display/mediatek/mediatek,ovl.yaml | 101 +++++++ .../display/mediatek/mediatek,rdma.yaml | 112 ++++++++ .../display/mediatek/mediatek,split.yaml | 56 ++++ .../display/mediatek/mediatek,ufoe.yaml | 59 ++++ .../display/mediatek/mediatek,wdma.yaml | 86 ++++++ arch/arm64/boot/dts/mediatek/mt8195.dtsi | 111 ++++++++ drivers/gpu/drm/mediatek/Makefile | 1 + drivers/gpu/drm/mediatek/mtk_disp_drv.h | 8 + drivers/gpu/drm/mediatek/mtk_disp_merge.c | 268 ++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 238 ++++++++++------ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 24 +- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 106 ++++--- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 + drivers/soc/mediatek/mt8195-mmsys.h | 114 ++++++++ drivers/soc/mediatek/mtk-mmsys.c | 11 + drivers/soc/mediatek/mtk-mutex.c | 98 ++++++- include/linux/soc/mediatek/mtk-mmsys.h | 9 + 30 files changed, 2041 insertions(+), 364 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_merge.c create mode 100644 drivers/soc/mediatek/mt8195-mmsys.h