Message ID | 20210913081424.48613-1-vincenzo.frascino@arm.com (mailing list archive) |
---|---|
Headers | show |
Series | arm64: ARMv8.7-A: MTE: Add asymm mode support | expand |
On Mon, Sep 13, 2021 at 1:21 AM Vincenzo Frascino <vincenzo.frascino@arm.com> wrote: > > This series implements the asymmetric mode support for ARMv8.7-A Memory > Tagging Extension (MTE), which is a debugging feature that allows to > detect with the help of the architecture the C and C++ programmatic > memory errors like buffer overflow, use-after-free, use-after-return, etc. Unless I'm missing something, it looks like this only includes KASAN support and not userspace support. Is userspace support coming in a separate patch? The fact that this only includes KASAN support should probably be in the commit messages as well. Peter
On 9/20/21 11:29 PM, Peter Collingbourne wrote: > On Mon, Sep 13, 2021 at 1:21 AM Vincenzo Frascino > <vincenzo.frascino@arm.com> wrote: >> >> This series implements the asymmetric mode support for ARMv8.7-A Memory >> Tagging Extension (MTE), which is a debugging feature that allows to >> detect with the help of the architecture the C and C++ programmatic >> memory errors like buffer overflow, use-after-free, use-after-return, etc. > > Unless I'm missing something, it looks like this only includes KASAN > support and not userspace support. Is userspace support coming in a > separate patch? > > The fact that this only includes KASAN support should probably be in > the commit messages as well. > Good catch, I forgot to mention that this series is meant only for in-kernel support. I will update the cover in the next iteration. Thanks! > Peter >
On Mon, Sep 13, 2021 at 09:14:19AM +0100, Vincenzo Frascino wrote: > This series implements the asymmetric mode support for ARMv8.7-A Memory > Tagging Extension (MTE), which is a debugging feature that allows to > detect with the help of the architecture the C and C++ programmatic > memory errors like buffer overflow, use-after-free, use-after-return, etc. > > MTE is built on top of the AArch64 v8.0 virtual address tagging TBI > (Top Byte Ignore) feature and allows a task to set a 4 bit tag on any > subset of its address space that is multiple of a 16 bytes granule. MTE > is based on a lock-key mechanism where the lock is the tag associated to > the physical memory and the key is the tag associated to the virtual > address. > > When MTE is enabled and tags are set for ranges of address space of a task, > the PE will compare the tag related to the physical memory with the tag > related to the virtual address (tag check operation). Access to the memory > is granted only if the two tags match. In case of mismatch the PE will raise > an exception. > > When asymmetric mode is present, the CPU triggers a fault on a tag mismatch > during a load operation and asynchronously updates a register when a tag > mismatch is detected during a store operation. > > The series is based on linux-v5.15-rc1. > > To simplify the testing a tree with the new patches on top has been made > available at [1]. > > [1] https://git.gitlab.arm.com/linux-arm/linux-vf.git mte/v1.asymm > > Cc: Andrew Morton <akpm@linux-foundation.org> > Cc: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will@kernel.org> > Cc: Dmitry Vyukov <dvyukov@google.com> > Cc: Andrey Ryabinin <aryabinin@virtuozzo.com> > Cc: Alexander Potapenko <glider@google.com> > Cc: Marco Elver <elver@google.com> > Cc: Evgenii Stepanov <eugenis@google.com> > Cc: Branislav Rankov <Branislav.Rankov@arm.com> > Cc: Andrey Konovalov <andreyknvl@gmail.com> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> > Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> > > Vincenzo Frascino (5): > kasan: Remove duplicate of kasan_flag_async > arm64: mte: Bitfield definitions for Asymm MTE > arm64: mte: CPU feature detection for Asymm MTE > arm64: mte: Add asymmetric mode support > kasan: Extend KASAN mode kernel parameter > > Documentation/dev-tools/kasan.rst | 10 ++++++++-- I'm surprised not to see any update to: Documentation/arm64/memory-tagging-extension.rst particularly regarding the per-cpu preferred tag checking modes. Is asymmetric mode not supported there? Will
Hi Will, sorry for the late reply but I am on sabbatical :) On 9/29/21 5:49 PM, Will Deacon wrote: > I'm surprised not to see any update to: > > Documentation/arm64/memory-tagging-extension.rst > > particularly regarding the per-cpu preferred tag checking modes. Is > asymmetric mode not supported there? > The document that you are pointing out covers the userspace support, this series introduces the in-kernel support only for asymmetric MTE. The userspace bits for asymm will be added with a future series. The confusion comes from the fact, as Peter correctly pointed already, that I forgot to mention this vital info in the cover letter. Sorry about that I will make sure that this is addressed in v2. Thanks! > Will
This series implements the asymmetric mode support for ARMv8.7-A Memory Tagging Extension (MTE), which is a debugging feature that allows to detect with the help of the architecture the C and C++ programmatic memory errors like buffer overflow, use-after-free, use-after-return, etc. MTE is built on top of the AArch64 v8.0 virtual address tagging TBI (Top Byte Ignore) feature and allows a task to set a 4 bit tag on any subset of its address space that is multiple of a 16 bytes granule. MTE is based on a lock-key mechanism where the lock is the tag associated to the physical memory and the key is the tag associated to the virtual address. When MTE is enabled and tags are set for ranges of address space of a task, the PE will compare the tag related to the physical memory with the tag related to the virtual address (tag check operation). Access to the memory is granted only if the two tags match. In case of mismatch the PE will raise an exception. When asymmetric mode is present, the CPU triggers a fault on a tag mismatch during a load operation and asynchronously updates a register when a tag mismatch is detected during a store operation. The series is based on linux-v5.15-rc1. To simplify the testing a tree with the new patches on top has been made available at [1]. [1] https://git.gitlab.arm.com/linux-arm/linux-vf.git mte/v1.asymm Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: Dmitry Vyukov <dvyukov@google.com> Cc: Andrey Ryabinin <aryabinin@virtuozzo.com> Cc: Alexander Potapenko <glider@google.com> Cc: Marco Elver <elver@google.com> Cc: Evgenii Stepanov <eugenis@google.com> Cc: Branislav Rankov <Branislav.Rankov@arm.com> Cc: Andrey Konovalov <andreyknvl@gmail.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Vincenzo Frascino (5): kasan: Remove duplicate of kasan_flag_async arm64: mte: Bitfield definitions for Asymm MTE arm64: mte: CPU feature detection for Asymm MTE arm64: mte: Add asymmetric mode support kasan: Extend KASAN mode kernel parameter Documentation/dev-tools/kasan.rst | 10 ++++++++-- arch/arm64/include/asm/memory.h | 1 + arch/arm64/include/asm/mte-kasan.h | 5 +++++ arch/arm64/include/asm/sysreg.h | 3 +++ arch/arm64/kernel/cpufeature.c | 10 ++++++++++ arch/arm64/kernel/mte.c | 26 ++++++++++++++++++++++++++ arch/arm64/tools/cpucaps | 1 + mm/kasan/hw_tags.c | 27 ++++++++++++++++++++++----- mm/kasan/kasan.h | 7 +++++-- 9 files changed, 81 insertions(+), 9 deletions(-)