From patchwork Wed Sep 22 10:31:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chin-Ting Kuo X-Patchwork-Id: 12510091 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F5B0C433F5 for ; Wed, 22 Sep 2021 10:34:57 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5357461211 for ; Wed, 22 Sep 2021 10:34:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 5357461211 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=aspeedtech.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=S0AAYATKavqvndBFCibNrcbxKP8TTSpj+aVX+UBqAno=; b=sQw/IfjPKBC5IY lZ8Y48hrEP39p3tSFfaxE3sx2q+NNtg426wLqS9f1Rjn8JeH1aZDpCU3RrrwKMHIWELhtl47wIo4r mG/RNNFHxLx5mcoyUoIK92o8jwaGGnIX4lPn3b3t3agDlEQO86O4PTnYsUJrMR/3QwsfxWd9D3+I9 2ZegjNMWcjWSi3nivJ4X3tb4NusaUJufQ5IuRg2hlQKjCBfIM4bCTPdy/fsRKgByMZBx13Potd0fO ZxRzXLxHPhqhiJ3SYVcBm9Idhe6AW6xwYg18maEVL/mOKrtKiHJqcaJ24VWnnsk2nJ4gaEaSzgUz0 gYq3uUa/yfdMJ50gV37Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mSzXv-007pI6-NZ; Wed, 22 Sep 2021 10:32:11 +0000 Received: from [211.20.114.71] (helo=twspam01.aspeedtech.com) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mSzXe-007pCW-2N for linux-arm-kernel@lists.infradead.org; Wed, 22 Sep 2021 10:31:55 +0000 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 18MAB7vf012562; Wed, 22 Sep 2021 18:11:07 +0800 (GMT-8) (envelope-from chin-ting_kuo@aspeedtech.com) Received: from localhost.localdomain (192.168.10.9) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 22 Sep 2021 18:31:25 +0800 From: Chin-Ting Kuo To: , , , , , , , , , , , , CC: , Subject: [PATCH 00/10] ASPEED SD/eMMC controller clock configuration Date: Wed, 22 Sep 2021 18:31:06 +0800 Message-ID: <20210922103116.30652-1-chin-ting_kuo@aspeedtech.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [192.168.10.9] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 18MAB7vf012562 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210922_033154_411745_0A7C31C6 X-CRM114-Status: UNSURE ( 9.85 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch series aims to configure SD and eMMC controllers' clock frequency and clock phase parameters. The main modification is the clock phase calculation method which has been checked with the HW IP designer. Also, the clock source detection method is updated for AST2600-A2/A3. This patch series has been verified on AST2600-A3 EVB. Chin-Ting Kuo (10): clk: aspeed: ast2600: Porting sdhci clock source sdhci: aspeed: Add SDR50 support dts: aspeed: ast2600: Support SDR50 for SD device mmc: Add invert flag for clock phase signedness mmc: aspeed: Adjust delay taps calculation method arm: dts: aspeed: Change eMMC device compatible arm: dts: aspeed: Adjust clock phase parameter arm: dts: ibm: Adjust clock phase parameter dt-bindings: mmc: aspeed: Add max-tap-delay property dt-bindings: mmc: aspeed: Add a new compatible string .../devicetree/bindings/mmc/aspeed,sdhci.yaml | 4 + arch/arm/boot/dts/aspeed-ast2600-evb-a1.dts | 8 ++ arch/arm/boot/dts/aspeed-ast2600-evb.dts | 11 +- arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 3 +- arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 3 +- arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts | 3 +- arch/arm/boot/dts/aspeed-g6.dtsi | 2 +- drivers/clk/clk-ast2600.c | 69 ++++++++-- drivers/mmc/core/host.c | 10 +- drivers/mmc/host/sdhci-of-aspeed.c | 123 ++++++++++++++---- include/linux/mmc/host.h | 2 + 11 files changed, 193 insertions(+), 45 deletions(-)