From patchwork Thu Dec 9 21:53:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alain Volmat X-Patchwork-Id: 12695531 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C9AFC433EF for ; Thu, 9 Dec 2021 21:55:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=zp6CxhYmozLrQvSbzDc+CU6X6bfZf+M2fCkOj+0wXzg=; b=RoBodPm/TXw0hW wwx6+7IcPgoMeUg9mJgZXnX8mZMrw6TOJRO1lyhOcZ0Ziw9rsYsJ5S+h03eNyUI/N32NBQ6ChPIoY JY/lExOEgYwQWhabzUgcWiPDgOy5OANf766SLX7J+lMXKBkW5AgPDxL+v8oqq8ntB+eThlcSmf/bz YkCXi2epJdyPSEm9Zu9m0nYyos5FdnX+7RHAeDXNrZbqCNdJIYaPA5a2dFML0DYXUOpsST7yen9jo WWHosDHmpJU42Sn1w2Gew3yeSqb+fiJDc3Cgut9iH5cu/aYaFXf9EkiAiPyfIrE0IsrprPGEA9nKE xnvIHdZAq2qvSNFfI95A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mvRMb-0008Mf-AJ; Thu, 09 Dec 2021 21:54:05 +0000 Received: from st43p00im-ztdg10071801.me.com ([17.58.63.171]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mvRMX-0008Km-UI for linux-arm-kernel@lists.infradead.org; Thu, 09 Dec 2021 21:54:03 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=me.com; s=1a1hai; t=1639086838; bh=M0B2liDwXjvBYjwMmljDiZ2A1vTqkXdsDWnp7pT78E4=; h=From:To:Subject:Date:Message-Id:MIME-Version; b=uacvPA9+rrGAP5qyGsY+iGyF9eUKQ/WvDM9vxuA2ox5yc2SViSdHyjNUY7XlC2Hf0 G/NoEPWZBaLIXhZgSMALGRiwK2llvZ/tIHAY2D9mBwXMuotMdA5QTNYNIhq1w8jNcR wjSj5dSiK8rFA0Vgcary1zQigjlsqiwJwvmyjuLjU1LEimfSke0S7/HMPhew5WT+Ax ha3StvybsIomO/l4x2RqQ3DElhtXb7bLMdZr3liPxOGJnL64F3o22owS2wu/YF+C1D yqdPnGmHrSeroGl0U/3cr+lSESPPGaKqfGl5LSp83cM7z+n1mPpYOvUx/8Ijr2aQiT BjE3/paBDfAsw== Received: from localhost (101.220.150.77.rev.sfr.net [77.150.220.101]) by st43p00im-ztdg10071801.me.com (Postfix) with ESMTPSA id BE1F1540475; Thu, 9 Dec 2021 21:53:56 +0000 (UTC) From: Alain Volmat To: Rob Herring , linux-pci@vger.kernel.org Cc: Patrice Chotard , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Fabrice Gasnier , avolmat@me.com Subject: [PATCH 0/5] Introduction of PCIe support on STi platform Date: Thu, 9 Dec 2021 22:53:45 +0100 Message-Id: <20211209215350.4207-1-avolmat@me.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Proofpoint-Virus-Version: =?utf-8?q?vendor=3Dfsecure_engine=3D1=2E1=2E170-?= =?utf-8?q?22c6f66c430a71ce266a39bfe25bc2903e8d5c8f=3A6=2E0=2E425=2C18=2E0?= =?utf-8?q?=2E790=2C17=2E0=2E607=2E475=2E0000000_definitions=3D2021-12-09=5F?= =?utf-8?q?08=3A2021-12-08=5F01=2C2021-12-09=5F08=2C2020-04-07=5F01_signatur?= =?utf-8?q?es=3D0?= X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 phishscore=0 suspectscore=0 mlxscore=0 malwarescore=0 clxscore=1011 mlxlogscore=963 bulkscore=0 adultscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2112090112 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211209_135402_087914_3E39A067 X-CRM114-Status: GOOD ( 11.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The STi platform SoC embed a designware based PCIe controller. This serie include the driver for the controller and DT for the stih407-family and for the stih418-b2264 into which it is used. Within the DT and the binding, only st,stih407-pcie compatible is used. Rob, could you clarify if I need to mention both compatible (st,stih407-pcie and snps,dw-pcie) or if st,stih407-pcie is enought ? Alain Volmat (5): dt-bindings: pci: st-pcie: PCIe controller found on STi platforms pci: dwc: pcie-st: Add PCIe driver for STi platforms MAINTAINERS: add entry for ST STI PCIE driver ARM: dts: sti: add the PCIe controller node within stih407-family ARM: dts: sti: enable PCIe on the stih418-b2264 board .../devicetree/bindings/pci/snps,dw-pcie.yaml | 2 +- .../devicetree/bindings/pci/st,st-pcie.yaml | 112 ++++++ MAINTAINERS | 6 + arch/arm/boot/dts/stih407-family.dtsi | 40 ++ arch/arm/boot/dts/stih418-b2264.dts | 5 + drivers/pci/controller/dwc/Kconfig | 11 + drivers/pci/controller/dwc/Makefile | 1 + drivers/pci/controller/dwc/pcie-sti.c | 380 ++++++++++++++++++ 8 files changed, 556 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/pci/st,st-pcie.yaml create mode 100644 drivers/pci/controller/dwc/pcie-sti.c