From patchwork Tue Dec 21 08:18:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Aswath Govindraju X-Patchwork-Id: 12696959 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9F0ABC433F5 for ; Tue, 21 Dec 2021 08:19:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=pGJnP5s9t09AlXhbcC7/jQQiYtLO1wfp0R5Fn7sO1KM=; b=BXjdFZSXe0luso WfaXWggfvQp5oJ3iWthbbZTg8iAr7UvV6mNtT1MYRO8nNzaRPTmtGq3UuGrXsz6PFxiceWWr/P0xr 1O3vvkyDGRXNwpyLFM8muQarwr7ECX7zPHcr1yHxnuii7LMkMzkKiYde1Xk1taBy1otAMUItr4FQi LMfqVX8LJf0IG+F3jjyxDnhqu5+5SeowGOxZK6+iaXQYT7w3QuaFRM3zO0+5A1j9IQ1tDZbmrHbBm LvgLNSKR02IXrZCHMW91mlmCvsAywCzYHStJe2/YNVX3OBiD4wcw9P4uKW6v4I6aw3DxPAUtXgYpX gu0zdhm4ARb9NVJ0Ts1Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mzaLu-005tTB-FM; Tue, 21 Dec 2021 08:18:30 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mzaLf-005tOw-Ne for linux-arm-kernel@lists.infradead.org; Tue, 21 Dec 2021 08:18:17 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 1BL8IAVn091851; Tue, 21 Dec 2021 02:18:10 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1640074690; bh=SNfL/XSVVO8Qq8yWmhGRclrb0+LUC/rNWGrtwtycHyM=; h=From:To:CC:Subject:Date; b=d5Qrw/R2pGydJN59HNsKhfQoBZ8tTSqMKbYad/WZ7nbE2l0byziZVbw2xHvZDncKv 5TeMvUHKqvdTNhTfCm60oi/k8zTV02bsLqstniJcX8JX14wHdvx/GlU2Ra9eb01KQh JxoVAfX63ZXmGjL+oQJorU5ZjPddFYllF5SF0ZNY= Received: from DLEE103.ent.ti.com (dlee103.ent.ti.com [157.170.170.33]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 1BL8IAp9029989 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 21 Dec 2021 02:18:10 -0600 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Tue, 21 Dec 2021 02:18:10 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Tue, 21 Dec 2021 02:18:10 -0600 Received: from gsaswath-HP-ProBook-640-G5.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 1BL8I7o8010607; Tue, 21 Dec 2021 02:18:08 -0600 From: Aswath Govindraju To: CC: , , , Rob Herring , Tero Kristo , Vignesh Raghavendra , Nishanth Menon , Kishon Vijay Abraham I Subject: [PATCH v4 0/5] J721S2: Add initial support Date: Tue, 21 Dec 2021 13:48:01 +0530 Message-ID: <20211221081806.7836-1-a-govindraju@ti.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211221_001815_939798_3B265A09 X-CRM114-Status: GOOD ( 12.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The J721S2 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration in automotive ADAS applications and industrial applications requiring AI at the network edge. This SoC extends the Jacinto 7 family of SoCs with focus on lowering system costs and power while providing interfaces, memory architecture and compute performance for single and multi-sensor applications. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, three clusters of lockstep capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA), C7x floating point Vector DSP. * 3D GPU: Automotive grade IMG BXS-4-64 * Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC) * Two CSI2.0 4L RX plus one eDP/DP, two DSI Tx, and one DPI interface. * Two Ethernet ports with RGMII support. * Single 4 lane PCIe-GEN3 controllers, USB3.0 Dual-role device subsystems, * Up to 20 MCANs, 5 McASP, eMMC and SD, OSPI/HyperBus memory controller, QSPI, I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals. * Hardware accelerator blocks containing AES/DES/SHA/MD5 called SA2UL management. * Chips and Media Wave521CL H.264/H.265 encode/decode engine See J721S2 Technical Reference Manual (SPRUJ28 – NOVEMBER 2021) for further details: http://www.ti.com/lit/pdf/spruj28 - bootlog: https://pastebin.ubuntu.com/p/nHQxf6Yg3N/ The following series of patches depend on, - http://lists.infradead.org/pipermail/linux-arm-kernel/2021-December/700936.html - https://patchwork.kernel.org/project/linux-dmaengine/list/?series=583035 - https://patchwork.kernel.org/project/linux-phy/list/?series=574093 Changes since v3: - Removed unused alaises and changed the alias for main_uart8 to serial2 - Moved the aliases to board dts file Changes since v2: - Removed mux.h and phy.h header files that were unused. Changes since v1: - Picked up Rob Herring's acked-bys for patches 1 and 2 - Removed unnecessary header file in patch 3 Aswath Govindraju (5): dt-bindings: arm: ti: Add bindings for J721s2 SoC dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2 arm64: dts: ti: Add initial support for J721S2 SoC arm64: dts: ti: Add initial support for J721S2 System on Module arch: arm64: ti: Add support J721S2 Common Processor Board .../devicetree/bindings/arm/ti/k3.yaml | 6 + arch/arm64/boot/dts/ti/Makefile | 2 + .../dts/ti/k3-j721s2-common-proc-board.dts | 430 ++++++++ arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 937 ++++++++++++++++++ .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 302 ++++++ arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 174 ++++ arch/arm64/boot/dts/ti/k3-j721s2.dtsi | 167 ++++ include/dt-bindings/pinctrl/k3.h | 3 + 8 files changed, 2021 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-j721s2.dtsi