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[98.233.193.225]) by smtp.gmail.com with ESMTPSA id t1sm2142883qtc.48.2022.01.27.16.38.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jan 2022 16:38:14 -0800 (PST) From: Peter Geis To: Cc: Peter Geis , Rob Herring , Heiko Stuebner , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/4] Quartz64-A fixes and enablement from 5.17-rc1 Date: Thu, 27 Jan 2022 19:38:04 -0500 Message-Id: <20220128003809.3291407-1-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220127_163818_638430_54DEEA37 X-CRM114-Status: UNSURE ( 8.82 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Good Evening, This is the first of several patch series for further expanding Quartz64-A support. This series has the following patches: Fix the ddr regulator voltage. Add pmu_io_domains to permit sdio and high speed emmc support. Add sdmmc1 node for wifi support. Annotate con40 functions and enable i2c3. Please review and apply. Very Respectfully, Peter Geis Changelog: v2: - drop status = "okay" from sdio_pwrseq - drop disable-wp from sdmmc1 - move reset-gpios to be alphabetical in sdio_pwrseq - add con40 annotation patch Peter Geis (4): arm64: dts: rockchip: fix Quartz64-A ddr regulator voltage arm64: dts: rockchip: add Quartz64-A pmu_io_domains arm64: dts: rockchip: add Quartz64-A sdmmc1 node arm64: dts: rockchip: add Quartz64-A con40 hardware .../boot/dts/rockchip/rk3566-quartz64-a.dts | 81 ++++++++++++++++++- 1 file changed, 79 insertions(+), 2 deletions(-)