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Ivanov" , "Lee, Chun-Yi" , Chester Lin Subject: [RFC PATCH 0/3] Add SCMI clk support for NXP S32G2 Date: Mon, 7 Feb 2022 21:24:41 +0800 Message-ID: <20220207132444.3653-1-clin@suse.com> X-Mailer: git-send-email 2.33.1 X-ClientProxiedBy: AM6PR01CA0070.eurprd01.prod.exchangelabs.com (2603:10a6:20b:e0::47) To VI1PR0402MB3439.eurprd04.prod.outlook.com (2603:10a6:803:4::13) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 414d6f17-81f0-44c7-f1fe-08d9ea3d3b9b X-MS-TrafficTypeDiagnostic: PA4PR04MB9248:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ZYtjZc8ej1u1DzPqUZHNfLio8/aC6teMcF5buH03VwCiGy5i7iph4bNTZUiUQG0zDZDav1STgZ1kTdxs2fjiYSImk8Bkfh8NSUFCvhUOpYL46bBuHBF+aqEwuOI94OG+CADy5vA2udrzttAzVuBCYacKAqCwmduGhtOq3w91rxoB9kyaWwfyJTEOQ9hG9g3NWiSUh6y1tDVheYI8BFw1VP4KXOKS/0DdR+G9X6aXU1usrbZ8Ha7qCViHWYNGzNEc+Y8MK5y/fyP3+c2X8hDgZeA7uyuBC026REYvYIygEQuf9byVAmpMvBnKoEYr6O0hJGNPQtZwIMTMoJuOG0rRc+rbqipJ8ZF8SFJbdq30tRxFflLgty/SOy25utssiSNNL1AF094WOYBjIfpK6EgN3ObSMEFRmR/PvUi/s8GnqeI0rIgkdTIVq+JGFOrH2Q9AiNydqvVPUsXZnrRTtVmLjywsMv2DW2o6F++29gfDMANhLdvgsMwx6GVTxZaA5DwOc3hQZwe89BlN9r4cxY557u9gI0DN12QV63EsWvbFzGRIMoqj3LoO9zRb4+H0FcGv0JDngkvXOF5VGGCpHWv9EHOLbmQ3qgH9+AQOXly05JCtQgAYGh34bbIHBeWb6BMVF2bRVjv7toDqMRIevGEMgesUEFB4G/oN9JnVnCFIeS1Aldu1V0tvKgp584/4RCowz4F/2ROFFv9y7tS/o8q2udUAwnuvGgBlKrklPxeQJ5I= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:VI1PR0402MB3439.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230001)(366004)(6666004)(66556008)(8936002)(66946007)(5660300002)(6512007)(66476007)(4326008)(6506007)(8676002)(966005)(83380400001)(6486002)(36756003)(2616005)(1076003)(26005)(86362001)(110136005)(2906002)(54906003)(508600001)(38100700002)(107886003)(316002)(186003); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3d2Y2CaxHu+3u5HrwjujXoipgMZEO93Uxh0jGAxS4Ksj7MuGJm0NMp+cW/13/jl8ROqmbQ9MY7CqgVfWCxeYGp7X/4UT8eJSQlWRrCPXlbK0oK9CTPRSP4Mar9Kz4lzlBYQzgwtD/R4Eqx+Yh8yivsU4qhGO2V2viTS/2ErnrWTLBPqyIW4gT43tMQzXH90Brf8lllHOSu3VqJ3aJlW+MBBCl1e7Xpc3asXlldOMSc+76cecrpisYhTuMwhgn1OO22r6fNPdWvjCbkwQjLqkDkgAw2z+62VjZjaAFnCKaAeGX+lBIH7xPnNzvtnKYjHvnry1Jk3Cy3TcJYHl/4i3IKZ9wMFA2YgHpiQjH5CEZXuIJmgB59OAkHv1u1zkxfqPscfRBtXglPP6qkG+nVPMfWVPhZf/xDNjYOwQjCJ65mzq+aN4bSpvwgEunVSqwiH/xe20tu1DNVnvxoZk8Fj+TDVa7XFzdzwQZ3qJ2PI6yDKoGrsHJtnro9fIO4bHwpIKa/HGls53sH3XQUwO1gmyfHDwBDymLWZVOTktpNjFj2iEA9kzHze1+Wz3Mr8nhaOsLRqdBNGLRdAZM9kCE6lMh72UZ+KyxKWSCPY82qnWhbeO8x4xbms6bhUX1l/cj3MnCfeqEmW2+CmKMlQdkNWM9G4w0Y0DEbZwTNFTgsCe1gjlq0MMAMn2WhaaNEJgFd5M9N+bJScXdUyvjtOBSFzPOJFxJ6Dzr4+WeQilmiDPKTwcwimg2Y5bRCqiHzf+GqyzRoasz9vHVtn5Jv1UcVL2X1FYBewcywCQhyIeDUb4AeyYP3EAnn8j8duFhrMWT6Z9XJWX35+896hAGRH+lgMHi1ZL3nGsqIe+9AJXvcgUQmiy7fT5OEVBRZH9/4w2YU8sN/BxSJttWvKvLdOF3V1Aj8vhpIU1SiiMnRgy6KEzZAfhBFJr9Ki1YKxDwYB45pJcox+befcTR+Z7UGwDsZSLzlV4zyNiSsbvy3nMKctukFweuV6GPOCq3UZH2ufaZwNFDgctc5lszY+TA/VppKaIEXTLFEUCl6pZtNuGvIleEyjHZgFXZiu2rMe8zOT4DhE3yJaJtWGsKcRyoLvUhYuQRnyKOrz1XQiqnXlivugFrLe9DDneTSgL3WFmxhngaDGeynmm2NyrPKpl3jIDZnMLqpY1zQ/8nyh7Say5De0moPGZF/5jH9Ns/+t5gZ3GboOJbRhDrIQcYbXoCvwqZDmwM9NtbGRRWot5PyeZkmA7QjOkbsnCL0HGjEZwjG++Pjyx7eBVAllzERvyZVw/rK9GSIA/8cYOWsF9MZ6lhKC2PVmU69MIeQdE7Sg2Q6dad0auxju+iIZ/jjwalwbD/QRZyPvCPYQg6wzm085MH3m4TVQBnUXM09e0UrG4PnynHZjpubIerfvHN+wS8CbbfK5EO0LHKrM9u/+m4wims6UeQ3aTn2yp7UVCfgksWcXzF1OsqLEGzHH29K7A9APW+AIkQa+w8DLlvdIjpMi+PRNhE8vNpThmUnZTHwxG1mFhZ2/pIpMzEvb11FNAaM60hxhxv1nXcIZNIyb1OHSISPdpwVE= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: 414d6f17-81f0-44c7-f1fe-08d9ea3d3b9b X-MS-Exchange-CrossTenant-AuthSource: VI1PR0402MB3439.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Feb 2022 13:24:56.5803 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: AvzxCJaI+5Jc24iMKdHeHws90mociie9EcwsKczA+jEwbwQz6zfebYeME1F++rD3 X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR04MB9248 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220207_052505_802470_ED8ABC65 X-CRM114-Status: UNSURE ( 8.91 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi folks, Here I'd like to propose an upstream patchset to support clock management of NXP S32G2 platforms based on ARM-SCMI's clock protocol (0x14). The goal is to have simple clock settings for enabling limited functions, such as MMC and GMAC0. Most of codes are mainly refined/refactored/redistributed from NXP's downstream codebase on CodeAurora[1] under the original license announcements and all SCMI clock IDs still match the implementations of NXP's downstream TF-A[2]. For those downstream authors who implement the main/original ideas, please forgive me that I only leave my name as "Signed-off-by" because I'm not sure if you might agree with these changes. Please feel free to let me know if you don't mind to be added into the list. I roughly verified this patchset with NXP downstream firmware blobs [major ver: bsp30 & bsp31], such as TF-A[2] and U-Boot[3] (BL33) on CodeAurora. Thanks for your patience. Chester [1]: https://source.codeaurora.org/external/autobsps32/linux/ [2]: https://source.codeaurora.org/external/autobsps32/arm-trusted-firmware/ [3]: https://source.codeaurora.org/external/autobsps32/u-boot/ Chester Lin (3): dt-bindings: clock: Add s32g2 clock binding arm64: dts: s32g2: add SCMI support arm64: dts: s32g2: add USDHC support arch/arm64/boot/dts/freescale/s32g2.dtsi | 40 +++++++++++++++++++ .../arm64/boot/dts/freescale/s32g274a-evb.dts | 4 ++ .../boot/dts/freescale/s32g274a-rdb2.dts | 4 ++ include/dt-bindings/clock/s32g2-clock.h | 28 +++++++++++++ 4 files changed, 76 insertions(+) create mode 100644 include/dt-bindings/clock/s32g2-clock.h