Message ID | 20220218120458.14036-1-t.remmet@phytec.de (mailing list archive) |
---|---|
Headers | show |
Series | arm64: dts: phyCORE-i.MX8MP SoM updates | expand |
On Fri, Feb 18, 2022 at 01:04:51PM +0100, Teresa Remmet wrote: > second version of several small changes for the phyCORE-i.MX8MP > SoM device tree. Including drive strength updates of different > interfaces and PMIC configuration changes. > > Changes in v2: > - Updated commit message of patch [7/7] as suggested > by Haibo > - Added Reviewed-by from Haibo > > Regards, > Teresa > > Jonas Kuenstler (1): > arm64: dts: imx8mp-phycore-som: Set usdhc root clock for eMMC > > Teresa Remmet (6): > arm64: dts: imx8mp-phycore-som: Set minimum output impedance for eth > phy > arm64: dts: imx8mp-phycore-som: Adapt eMMC drive strength > arm64: dts: imx8mp-phycore-som: Reduce drive strength for fec tx lines > arm64: dts: imx8mp-phycore-som: Update WDOG muxing > arm64: dts: imx8mp-phycore-som: Set VDD_ARM run and standby voltage > arm64: dts: imx8mp-phycore-som: LDO5 needs to be enabled instead of > LDO4 Applied, thanks!