From patchwork Tue Mar 8 00:37:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jae Hyun Yoo X-Patchwork-Id: 12772839 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9D64C433EF for ; Tue, 8 Mar 2022 00:39:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=NvFFj6Hl5bkBXrbidcBAPI+569FdD6+7433QvvYYE+g=; b=ESusna8ggh9ukt DzCovWp00DucMIbHfmTdEY+Mk1XqNyZy5YnomgOqdXhrLS1IUKXBow+H3QBoUUMfYKzn68oBoO5tk hRj4S+T0QblNFOU9yYAjGbPL5842nFUGpXy3975trQVK2o/vva6z0xo5SIzXAx5Znw9fRp+YdeHKY c7WZnztDUCU+7NBgPpMFM9ZF/QDP6N/b3Plu9mwfnzvRo1EbaFv7FIwLntRwRgH+gok+BKKZBTr/x MCifE1IvJ+y6RcZCw+1P1HpXuIojjAo572KbPE2XS8sGaQmE1Sga3gOlxcg0MaSp6U9EUsUCuHBto 5LPpeoZiwjpQVjPrt06w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nRNrW-0029wD-Oq; Tue, 08 Mar 2022 00:38:03 +0000 Received: from alexa-out-sd-02.qualcomm.com ([199.106.114.39]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nRNrS-0029uq-Ki for linux-arm-kernel@lists.infradead.org; Tue, 08 Mar 2022 00:37:59 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1646699878; x=1678235878; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=AFspTufxnZFR9Evdcdu/mYretERNYjS/iMbuOXoxi6M=; b=XzGxnhLgtWSD63hWIdok6DsWKPmefNdzIx5afFsP74BA4nUH4VArDmhO eAr4kcrYGLD7GcZ+tbA/KD7AJvDemHqMLqbqh2ZlYQxQPZNmdCJtmvSIe 2IdeWhCdOQsK46qi5AUqwRZyJX/76BjhfTSyph+cQYPjrgobhlHUz27X6 s=; Received: from unknown (HELO ironmsg05-sd.qualcomm.com) ([10.53.140.145]) by alexa-out-sd-02.qualcomm.com with ESMTP; 07 Mar 2022 16:37:57 -0800 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg05-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2022 16:37:57 -0800 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Mon, 7 Mar 2022 16:37:56 -0800 Received: from maru.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.15; Mon, 7 Mar 2022 16:37:55 -0800 From: Jae Hyun Yoo To: Joel Stanley , Rob Herring , "Andrew Jeffery" , Linus Walleij CC: Jamie Iles , Graeme Gregory , , , , "Jae Hyun Yoo" Subject: [PATCH 0/5] Fix AST2600 quad mode SPI pinmux settings Date: Mon, 7 Mar 2022 16:37:40 -0800 Message-ID: <20220308003745.3930607-1-quic_jaehyoo@quicinc.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220307_163758_730906_A547CAE2 X-CRM114-Status: UNSURE ( 8.56 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org I’m sending this patch series to fix current issues in AST2600 pinmux settings while enabling quad mode SPI support. FWSPI18 pins are basically 1.8v logic pins that are different from the dedicated FWSPI pins that provide 3.3v logic level, so FWSPI18 pins can’t be grouped with FWSPIDQ2 and FWSPIDQ3, so this series fix the issue. Also, fixes QSPI1 and QSPI2 function settings in AST2600 pinctrl dtsi to make it able to enable quad mode on SPI1 and SPI2 interfaces. With this series, quad mode pinmux can be set like below. FW SPI: &fmc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fwqspi_default>; } SPI1: &spi1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_qspi1_default>; } SPI2: &spi1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_qspi1_default>; } Please review. Thanks, Jae Jae Hyun Yoo (3): ARM: dts: aspeed-g6: remove FWQSPID group in pinctrl dtsi pinctrl: pinctrl-aspeed-g6: remove FWQSPID group in pinctrl dtsi ARM: dts: aspeed-g6: fix SPI1/SPI2 quad pin group Johnny Huang (2): pinctrl: pinctrl-aspeed-g6: add FWQSPI function-group ARM: dts: aspeed-g6: add FWQSPI group in pinctrl dtsi arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi | 10 +++++----- drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 17 ++++++++--------- 2 files changed, 13 insertions(+), 14 deletions(-)