From patchwork Fri Apr 8 08:00:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12806242 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71065C433F5 for ; Fri, 8 Apr 2022 07:59:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=3Xjwwx2HMOuMTgUo2hoEVkxKDXxfRaVykD7U/V1OMHs=; b=ztPuvkA2k5Gu+o UmfzyD6VlegwD1JyhAXRSiUIRGmOeRA4bHX+fr4avOPKpWJTlDsWpcIrqbWDmkWBbHcxpJCTP/FXu jC4EP4yoTh/9nPGhpoJgZ3RWr+mnprM/cFVEw41hD7RP7wQ2Gx6eKnlFaHpcd9xpuib/wnOXgMc60 mkljqNpWrYA5Ue4RwnxhetkwV3x+4GyAXIkj4spY0SdYuRfgUly2vIgPubYrojSPyB6/SZbxqNpvc ck5GWkYKr4PC2/y200H1H5lNuzpL1FMjB+PAyXp/RveE25kguXlaMjQve85iIih3BXF/09wus2pOh 0Id+MKOFGpJ1Ytr0VhZg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ncjVf-00Feru-Rw; Fri, 08 Apr 2022 07:58:23 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ncjVc-00Fepn-3s for linux-arm-kernel@lists.infradead.org; Fri, 08 Apr 2022 07:58:22 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1649404700; x=1680940700; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=v504pYW7RgErfmFZFhfV70JFK6RAZySTiXItBSHRxb0=; b=qnaeSAJ2rfw5adeuS2y20wcMTnNMOOG7GJMH6BlQ1eede/eAMcul3N7f XKnXm8LX1pCzOEFzjCCPvmx3aa5sjBpOwvyTaJgBmdNxxRyx5Hij9sdr/ nADkG8vfFR80qopKQob5Ar/4mVAr1el3xbMq+duD5cGcyLYNLHmo9bPAx MBDVHUya0oJKmMuZujrypDXQNwFXte2+nrAIEDfV3tIw7hs5Ex6WJ/W/5 PYDPt+JZg8Mb/Az8t85ZbFFO2Ayb4lPAV2TwwiMSUXwC61nPg58DGSHMX X0vEgC+JOfU3wHoP2e1BM8Y0IsygPC6Trq44eRUiFKUOg3RtpVXiIShDG Q==; X-IronPort-AV: E=Sophos;i="5.90,244,1643698800"; d="scan'208";a="159403630" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 08 Apr 2022 00:58:16 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 8 Apr 2022 00:58:15 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 8 Apr 2022 00:58:12 -0700 From: Claudiu Beznea To: , , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v3 00/10] power: reset: at91-reset: add support for sama7g5 Date: Fri, 8 Apr 2022 11:00:21 +0300 Message-ID: <20220408080031.2527232-1-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220408_005820_218826_70C2436D X-CRM114-Status: GOOD ( 11.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, The series adds reset controller support for SAMA7G5 SoCs. Compared with previous version the reset controller embedded on SAMA7G5 is able to reset individual on SoC devices (e.g. USB PHY controllers). Among with this I took the change and converted reset controller bindings to YAML (patch 2/8) and adapt reset controller nodes in device tree files to comply with DT specifications (patch 1/8). Thank you, Claudiu Beznea Changes in v3: - use spin_lock_irqsave()/spin_unlock_irqrestore() and lock only on update path - collected tags Changes in v2: - added patches 5/10 and 10/10 - in patch 2/10 use my microchip email address - in patch 4/10 added "SAMA7G5_" in front of macros to cope with file naming and used (GPL-2.0-only OR BSD-2-Clause) - in patch 6/10 documented the structure's members - in patch 7/10: - protect access to reset->dev_base with spin lock - check for valid values of reset_spec->args[0] in at91_reset_of_xlate() - s/if (IS_ERR(reset->rstc_base))/if (IS_ERR(reset->dev_base)) - include dt-bindings/reset/sama7g5-reset.h - document new added structure's members - collected tags Claudiu Beznea (10): ARM: dts: at91: use generic name for reset controller dt-bindings: reset: convert Atmel/Microchip reset controller to YAML dt-bindings: reset: atmel,at91sam9260-reset: add sama7g5 bindings dt-bindings: reset: add sama7g5 definitions power: reset: at91-reset: document structures and enums power: reset: at91-reset: add at91_reset_data power: reset: at91-reset: add reset_controller_dev support power: reset: at91-reset: add support for SAMA7G5 ARM: dts: at91: sama7g5: add reset-controller node ARM: configs: sama7: enable CONFIG_RESET_CONTROLLER .../devicetree/bindings/arm/atmel-sysregs.txt | 15 -- .../reset/atmel,at91sam9260-reset.yaml | 68 +++++++ arch/arm/boot/dts/at91sam9260.dtsi | 2 +- arch/arm/boot/dts/at91sam9261.dtsi | 2 +- arch/arm/boot/dts/at91sam9263.dtsi | 2 +- arch/arm/boot/dts/at91sam9g45.dtsi | 2 +- arch/arm/boot/dts/at91sam9n12.dtsi | 2 +- arch/arm/boot/dts/at91sam9rl.dtsi | 2 +- arch/arm/boot/dts/at91sam9x5.dtsi | 2 +- arch/arm/boot/dts/sam9x60.dtsi | 2 +- arch/arm/boot/dts/sama5d2.dtsi | 2 +- arch/arm/boot/dts/sama5d3.dtsi | 2 +- arch/arm/boot/dts/sama5d4.dtsi | 2 +- arch/arm/boot/dts/sama7g5.dtsi | 7 + arch/arm/configs/sama7_defconfig | 1 + drivers/power/reset/at91-reset.c | 173 ++++++++++++++++-- include/dt-bindings/reset/sama7g5-reset.h | 10 + 17 files changed, 257 insertions(+), 39 deletions(-) create mode 100644 Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml create mode 100644 include/dt-bindings/reset/sama7g5-reset.h