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[v5,0/9] cpufreq: mediatek: Cleanup and support MT8183 and MT8186

Message ID 20220504130540.5902-1-rex-bc.chen@mediatek.com (mailing list archive)
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Series cpufreq: mediatek: Cleanup and support MT8183 and MT8186 | expand

Message

Rex-BC Chen (陳柏辰) May 4, 2022, 1:05 p.m. UTC
Cpufreq is a DVFS driver used for power saving to scale the clock frequency
and supply the voltage for CPUs. This series do some cleanup for MediaTek
cpufreq drivers and add support for MediaTek SVS[2] and MediaTek CCI
devfreq[3] which are supported in MT8183 and MT8186.

Changes for v5:
1. Modify the description for the reason we need to use mediatek,cci.
2. Drop [07/14] cpufreq: mediatek: Add .get function.

Changes for V4:
1. Revise drivers from reviewers' suggestion.
2. Fix name of opp table issue.

Changes for V3:
1. Rebased to linux-next-20220414.
2. Drop accepted patches.
3. Drop "cpufreq: mediatek: Use maximum voltage in init stage" because we
   make sure the voltage we set is safe for both mediatek cci and cpufreq.
4. Rename cci property to mediatek,cci.
5. Adjust order of cleanup patches.
6. Add new patches for cleanup, handle infinite loop and MT8183 dts.
7. Revise drivers from reviewers' suggestion.
8. Revise commit message of some patches to avoid confusion and misunderstand.
9. Revise "cpufreq: mediatek: Link CCI device to CPU".
   We do not return successful to pretend we set the target frequency done
   when cci is not ready. Instead, we find and set a safe voltage so that we
   can set the target cpufrequency.

Changes for V2:
1. Drop the modification of transforming cpufreq-mediatek into yaml and
   only add the MediaTek CCI property for MediaTek cpufreq.
2. Split the original patches into several patches.

Reference series:
[1]: V1 of this series is present by Jia-Wei Chang.
     https://lore.kernel.org/all/20220307122151.11666-1-jia-wei.chang@mediatek.com/

[2]: The MediaTek CCI devfreq driver is introduced in another series.
     https://lore.kernel.org/all/20220425125546.4129-1-johnson.wang@mediatek.com/

[3]: The MediaTek SVS driver is introduced in another series.
     https://lore.kernel.org/all/20220420102044.10832-1-roger.lu@mediatek.com/

Andrew-sh.Cheng (1):
  cpufreq: mediatek: Add opp notification support

Jia-Wei Chang (3):
  cpufreq: mediatek: Move voltage limits to platform data
  cpufreq: mediatek: Refine mtk_cpufreq_voltage_tracking()
  cpufreq: mediatek: Add support for MT8186

Rex-BC Chen (5):
  dt-bindings: cpufreq: mediatek: Add MediaTek CCI property
  cpufreq: mediatek: Link CCI device to CPU
  arm64: dts: mediatek: Add opp table and clock property for MT8183
    cpufreq
  arm64: dts: mediatek: Add MediaTek CCI node for MT8183
  arm64: dts: mediatek: Add mediatek,cci property for MT8183 cpufreq

 .../bindings/cpufreq/cpufreq-mediatek.txt     |   7 +
 arch/arm64/boot/dts/mediatek/mt8183-evb.dts   |  36 ++
 .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi |   4 +
 arch/arm64/boot/dts/mediatek/mt8183.dtsi      | 285 +++++++++++++
 drivers/cpufreq/mediatek-cpufreq.c            | 399 ++++++++++++------
 5 files changed, 608 insertions(+), 123 deletions(-)

Comments

Viresh Kumar May 5, 2022, 8:53 a.m. UTC | #1
On 04-05-22, 21:05, Rex-BC Chen wrote:
>   arm64: dts: mediatek: Add opp table and clock property for MT8183
>     cpufreq
>   arm64: dts: mediatek: Add MediaTek CCI node for MT8183
>   arm64: dts: mediatek: Add mediatek,cci property for MT8183 cpufreq

I guess these would also go through my tree? Please get them acked by
SoC maintainers.

I would also need an Ack from Rob for the binding patch.
Rex-BC Chen (陳柏辰) May 5, 2022, 9:47 a.m. UTC | #2
On Thu, 2022-05-05 at 14:23 +0530, Viresh Kumar wrote:
> On 04-05-22, 21:05, Rex-BC Chen wrote:
> >   arm64: dts: mediatek: Add opp table and clock property for MT8183
> >     cpufreq
> >   arm64: dts: mediatek: Add MediaTek CCI node for MT8183
> >   arm64: dts: mediatek: Add mediatek,cci property for MT8183
> > cpufreq
> 
> I guess these would also go through my tree? Please get them acked by
> SoC maintainers.
> 
> I would also need an Ack from Rob for the binding patch.
> 

Hello Viresh,

I also mail to Matthias who is mediatek soc maintainer.
As for binding, I think we need to wait for the review from Rob or
Krzysztof.

BRs,
Rex