From patchwork Fri May 6 13:40:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12841173 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7EA32C433EF for ; Fri, 6 May 2022 13:41:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=FJo/RE+3A4MU+jvekyZYA1TrRO3rj8+3ZoIQJ0sEecg=; b=POC9z0Isco2Y3F 6Lof1VLdDll6kWbIMc4zNGgmaqkUFB8Gqi0TPKarhsLIkSuZ99RQsfVhKoioE/6iIKtiNqwSS4BIG xwpONhLE9uHBEtMXLSzQ5b/D4D9blRlgcZEwJxY0GCEvC/MOnXgfwc6l1Lo+7l601DPrS3i5RB7jz FoRsWgQ90WRnGMZ7KpgF1620FTcer3KTss6SF/dpFJoluBzxonUdnhwom/RmgQc1+07YPim4dtv6l en6OzdeJytnqtFg8KuWFVz1vDM2CAtZiu7z0hpGhxNMXBmNIFBJ+Qi1HlBBD9R+kb9NRYFclJxnmM kVwtGqHm1UoMF8O4ZfAA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmyCQ-003YDV-E7; Fri, 06 May 2022 13:40:51 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmyCK-003YA9-4r for linux-arm-kernel@lists.infradead.org; Fri, 06 May 2022 13:40:45 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 1E314620B0; Fri, 6 May 2022 13:40:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5040EC385A8; Fri, 6 May 2022 13:40:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651844442; bh=RT1F1zNAaJmkdaF49UnBjI25nZ5pYOQV7wKcebKfjIA=; h=From:To:Cc:Subject:Date:From; b=POIqY7hRPVqRnKVU7bJThf6D6fVf8sDOi3cAgufXdobV1guN0UAx5CuwtDzOr6hAg x5h2CV9WPv54Fi//9WoyVx/vkWq0vBDV1+UlxFtpnnffzktD3rVPwXXJLBcqcQIz3/ TRNCEU4YH2I2m1gI1Wum1gVnaBQmIjD7ERe5yr5U24DS5SKCPHG1XLHkDttoXqUAsu q9CFVaeXYz3BedK/5foq0NmU2AiyHqALDUe9MYJM3sDAUwSzJP8iJ463SO8h5VstVf kt2tREwT+cfKXkdKcVvMgw4sOcKbjL5LTA4dlK9ykOlACMnza6G7zS1KfjnySkh/6B oROnzoZTL0I5A== Received: by pali.im (Postfix) id 8180D1141; Fri, 6 May 2022 15:40:39 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Gleixner , Marc Zyngier , Rob Herring , Bjorn Helgaas , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Petazzoni , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 0/6] PCI: mvebu: Add support for PME and AER interrupts Date: Fri, 6 May 2022 15:40:23 +0200 Message-Id: <20220506134029.21470-1-pali@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220506_064044_282941_D3F20D85 X-CRM114-Status: GOOD ( 13.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org mvebu PCIe PME and AER interrupts are reported via PCIe summary interrupt. PCIe summary interrupt is reported via mvebu MPIC SoC error summary interrupt. And MPIC SoC error summary interrupt is reported via MPIC IRQ 4. This patch series implements support for interrupts in MPIC SoC error hierarchy in irq-armada-370-xp.c driver and support for interrupts in mvebu PCIe hierarchy in pci-mvebu.c. Finally PCIe PME and AER interrupts are routed to the correct PCIe Root Port, which allows kernel PME and AER drivers to take care of them. Tested on A385 board and kernel PME and AER drivers works correctly: [ 0.898482] pcieport 0000:00:01.0: PME: Signaling with IRQ 61 [ 0.904422] pcieport 0000:00:01.0: AER: enabled with IRQ 61 [ 0.910113] pcieport 0000:00:02.0: enabling device (0140 -> 0142) [ 0.916299] pcieport 0000:00:02.0: PME: Signaling with IRQ 62 [ 0.922216] pcieport 0000:00:02.0: AER: enabled with IRQ 62 [ 0.927917] pcieport 0000:00:03.0: enabling device (0140 -> 0142) [ 0.934090] pcieport 0000:00:03.0: PME: Signaling with IRQ 63 [ 0.940006] pcieport 0000:00:03.0: AER: enabled with IRQ 63 This change finally allows to debug PCIe issues on A385 boards. Pali Rohár (6): dt-bindings: irqchip: armada-370-xp: Update information about MPIC SoC Error irqchip/armada-370-xp: Implement SoC Error interrupts ARM: dts: armada-38x.dtsi: Add node for MPIC SoC Error IRQ controller dt-bindings: PCI: mvebu: Update information about summary interrupt PCI: mvebu: Implement support for interrupts on emulated bridge ARM: dts: armada-385.dtsi: Add definitions for PCIe summary interrupts .../marvell,armada-370-xp-mpic.txt | 9 + .../devicetree/bindings/pci/mvebu-pci.txt | 1 + arch/arm/boot/dts/armada-385.dtsi | 20 +- arch/arm/boot/dts/armada-38x.dtsi | 5 + drivers/irqchip/irq-armada-370-xp.c | 213 +++++++++++++++++- drivers/pci/controller/pci-mvebu.c | 208 +++++++++++++++-- 6 files changed, 426 insertions(+), 30 deletions(-)