From patchwork Wed Jun 8 09:56:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tomer Maimon X-Patchwork-Id: 12873150 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18F4CC43334 for ; Wed, 8 Jun 2022 10:10:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=diB84icMGHqTJ7YrEmLC5waVv9bIHlLz5bwnZUgkhT8=; b=IraCMlRNnhi2tI 4CY1nKU9vxdUOjLoBvWvDEv1/xm+bhAWrq0h+9YUNatrRQv8gnu4WExgaJfYkGrBEULMmXMW5Ya6b Wj0kyDM3HLG/3nRPU03IIEM0ZI7FkCXZVOwj6r4eWuY2zCVhVYxmEBES7hZ7wZVUcKER+1TZH6rSZ WBsWvhTUsJRFfWx5hU1sPfz8xLqdv0Tb47LSnWpEJBcpIvFfCGcYEyDfQ4vamsM9HmviKrPdicP7X GohMEspI8qEXbt0SJ921OAtIc6Zaqm0PjeQ/CoPykzt+7YIyethNrUI6WXBPC09YmumnPohFMCeU1 E4SMbZtpSV/r19k9IK/w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nyscJ-00CcHQ-Iv; Wed, 08 Jun 2022 10:08:48 +0000 Received: from maillog.nuvoton.com ([202.39.227.15]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nysal-00CbbP-C0 for linux-arm-kernel@lists.infradead.org; Wed, 08 Jun 2022 10:07:14 +0000 Received: from NTHCCAS04.nuvoton.com (NTHCCAS04.nuvoton.com [10.1.8.29]) by maillog.nuvoton.com (Postfix) with ESMTP id 6C0A21C80414; Wed, 8 Jun 2022 17:56:29 +0800 (CST) Received: from NTHCCAS01.nuvoton.com (10.1.8.28) by NTHCCAS04.nuvoton.com (10.1.8.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Wed, 8 Jun 2022 17:56:29 +0800 Received: from taln60.nuvoton.com (10.191.1.180) by NTHCCAS01.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2375.7 via Frontend Transport; Wed, 8 Jun 2022 17:56:28 +0800 Received: by taln60.nuvoton.com (Postfix, from userid 10070) id D27B362D98; Wed, 8 Jun 2022 12:56:27 +0300 (IDT) From: Tomer Maimon To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , Tomer Maimon Subject: [PATCH v2 00/20] Introduce Nuvoton Arbel NPCM8XX BMC SoC Date: Wed, 8 Jun 2022 12:56:03 +0300 Message-ID: <20220608095623.22327-1-tmaimon77@gmail.com> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220608_030711_714178_41850D90 X-CRM114-Status: GOOD ( 11.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patchset adds initial support for the Nuvoton Arbel NPCM8XX Board Management controller (BMC) SoC family. The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC. The NPCM8XX computing subsystem comprises a quadcore ARM Cortex A35 ARM-V8 architecture. This patchset adds minimal architecture and drivers such as: Clocksource, Clock, Reset, and WD. Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX. This patchset was tested on the Arbel NPCM8XX evaluation board. Addressed comments from: - Arnd Bergmann : https://www.spinics.net/lists/arm-kernel/msg982728.html https://www.spinics.net/lists/linux-serial/msg48179.html - Stephen Boyd: https://www.spinics.net/lists/arm-kernel/msg983594.html - Krzysztof Kozlowski: https://www.spinics.net/lists/kernel/msg4368955.html https://www.spinics.net/lists/arm-kernel/msg982427.html https://lore.kernel.org/all/973d75b8-0eb6-ff5b-6cd2-9b7d7c5cbcaa@linaro.org/ https://www.spinics.net/lists/arm-kernel/msg982778.html https://www.spinics.net/lists/arm-kernel/msg982588.html - Ilpo Järvinen: https://www.spinics.net/lists/kernel/msg4368936.html - Stephen Boyd: https://www.spinics.net/lists/arm-kernel/msg983596.html - Geert Uytterhoeven : https://www.spinics.net/lists/kernel/msg4369514.html Changes since version 1: - NPCM8XX clock driver - Modify dt-binding. - Remove unsed definition and include. - Include alphabetically. - Use clock devm. - NPCM reset driver - Modify dt-binding. - Modify syscon name. - Add syscon support to NPCM7XX dts reset node. - use data structure. - NPCM8XX device tree: - Modify evb compatible name. - Add NPCM7xx compatible. - Remove disable nodes from the EVB DTS. Tomer Maimon (20): clocksource: timer-npcm7xx: Add NPCM845 timer dt-bindings: serial: 8250: Add npcm845 compatible string tty: serial: 8250: Add NPCM845 UART support dt-bindings: watchdog: npcm: Add npcm845 compatible string watchdog: npcm_wdt: Add NPCM845 watchdog support dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock clk: npcm8xx: add clock controller dt-bindings: reset: modify to general NPCM name dt-bindings: reset: npcm: add GCR syscon property ARM: dts: nuvoton: add reset syscon property reset: npcm: using syscon instead of device data dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: Add NPCM8XX support dt-bindings: arm: npcm: Add maintainer dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: defconfig: Add Nuvoton NPCM family support .../devicetree/bindings/arm/npcm/npcm.yaml | 7 + .../bindings/arm/npcm/nuvoton,gcr.yaml | 2 + .../bindings/clock/nuvoton,npcm845-clk.yaml | 63 ++ ...750-reset.yaml => nuvoton,npcm-reset.yaml} | 21 +- .../devicetree/bindings/serial/8250.yaml | 1 + .../bindings/watchdog/nuvoton,npcm-wdt.txt | 3 +- MAINTAINERS | 3 + arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 1 + arch/arm64/Kconfig.platforms | 11 + arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/nuvoton/Makefile | 2 + .../dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 197 +++++ .../boot/dts/nuvoton/nuvoton-npcm845-evb.dts | 30 + .../boot/dts/nuvoton/nuvoton-npcm845.dtsi | 76 ++ arch/arm64/configs/defconfig | 3 + drivers/clk/Kconfig | 6 + drivers/clk/Makefile | 1 + drivers/clk/clk-npcm8xx.c | 756 ++++++++++++++++++ drivers/clocksource/timer-npcm7xx.c | 1 + drivers/reset/reset-npcm.c | 202 ++++- drivers/tty/serial/8250/8250_of.c | 1 + drivers/watchdog/npcm_wdt.c | 1 + .../dt-bindings/clock/nuvoton,npcm8xx-clock.h | 50 ++ .../dt-bindings/reset/nuvoton,npcm8xx-reset.h | 128 +++ 24 files changed, 1530 insertions(+), 37 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml rename Documentation/devicetree/bindings/reset/{nuvoton,npcm750-reset.yaml => nuvoton,npcm-reset.yaml} (58%) create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi create mode 100644 drivers/clk/clk-npcm8xx.c create mode 100644 include/dt-bindings/clock/nuvoton,npcm8xx-clock.h create mode 100644 include/dt-bindings/reset/nuvoton,npcm8xx-reset.h