From patchwork Fri Jun 24 13:36:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Liu X-Patchwork-Id: 12894503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 060DDC43334 for ; Fri, 24 Jun 2022 13:38:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; 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Fri, 24 Jun 2022 06:37:09 -0700 Received: from mtkmbs10n1.mediatek.inc (172.21.101.34) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 24 Jun 2022 06:37:07 -0700 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 24 Jun 2022 21:37:06 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 24 Jun 2022 21:37:05 +0800 From: Guodong Liu To: Linus Walleij , Rob Herring , Matthias Brugger , Sean Wang CC: =?unknown-8bit?q?Sean_Wang_=3Csean=2Ewang=40mediatek=2Ecom=3E=2C_Zhiyong?= =?unknown-8bit?q?_Tao_=3Czhiyong=2Etao=40mediatek=2Ecom=3E=2C_N=EDcolas_F_?= =?unknown-8bit?q?=2E_R_=2E_A_=2E_Prado_=3Cnfraprado=40collabora=2Ecom=3E=2C?= =?unknown-8bit?q?_=3Clinux-gpio=40vger=2Ekernel=2Eorg=3E=2C_=3Cdevicetree?= =?unknown-8bit?q?=40vger=2Ekernel=2Eorg=3E=2C_=3Clinux-arm-kernel=40lists?= =?unknown-8bit?q?=2Einfradead=2Eorg=3E=2C_=3Clinux-mediatek=40lists=2Einfra?= =?unknown-8bit?q?dead=2Eorg=3E=2C_=3Clinux-kernel=40vger=2Ekernel=2Eorg=3E?= =?unknown-8bit?q?=2C_=3CProject=5FGlobal=5FChrome=5FUpstream=5FGroup=40medi?= =?unknown-8bit?q?atek=2Ecom=3E=2C_Guodong_Liu_=3Cguodong=2Eliu=40mediatek?= =?unknown-8bit?q?=2Ecom=3E?= Subject: [PATCH v2 0/5] pinctrl: mediatek: add driver support driving and resistance property on mt8192 Date: Fri, 24 Jun 2022 21:36:55 +0800 Message-ID: <20220624133700.15487-1-guodong.liu@mediatek.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220624_063717_397941_D4BEE596 X-CRM114-Status: GOOD ( 11.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org changes since v1: - Patch 1 Add commit only, add "mediatek:" on the commit title for this patch, describe the patch modification in detail. - Patch 2 Add commit only, add "mediatek:" on the commit title for this patch, use space instead of tab before the =, Dropping E1, E0, and EN arrays in this patch, which were used by the original advanced drive configuration. - Patch 3 Add commit describe the patch modification in detail, add the missing pull type array for mt8192 to document the pull type of each pin and prevent invalid pull type settings. use space instead of tab after the ,. - Patch 4 Remove the original advanced drive configuration. - Patch 5 Remove pin definitions that do not support the R0 & R1 pinconfig property. v1: Patch 1 make driver consistent with "drive-strength" properties description of pinctrl-mt8192.yaml Patch 2 make driver consistent with "mediatek,drive-strength-adv" description pinctrl-mt8192.yaml, however, "mediatek,drive-strength-adv" description of pinctrl-mt8192.yaml needs to be synchronize a little bit. Patch 3 Since the bias-pull-{up,down} is generic properties, make driver to be used for setting type {PUPD/R1/R0 , PU/PD, PU/PD/RSEL}. Patch 4 Remove some pins definitions not support PUPD/R1/R0. Please see the following for detailed description Patch 1 provides generic driving setup, which support 2/4/6/8/10/12/14/16mA driving. Patch 2 provides I2C pins specific driving setup property, can support 0.125/0.25/0.5/1mA adjustment, and also support driving setup with unit microamp. Patch 3 provides I2C pins pull up/down type which is RSEL. It can support RSEL define or si unit value(ohm) to set different resistance Patch 4 Remove pin definitions that do not support the R0 & R1 pinconfig property Guodong Liu (5): pinctrl: mediatek: add generic driving setup property on mt8192 pinctrl: mediatek: add drive for I2C related pins on mt8192 pinctrl: mediatek: add rsel setting on mt8192 pinctrl: mediatek: dropping original advanced drive configuration function pinctrl: mediatek: fix the pinconf definition of some GPIO pins drivers/pinctrl/mediatek/pinctrl-mt8192.c | 296 ++++++++++++---------- 1 file changed, 163 insertions(+), 133 deletions(-)