From patchwork Sun Jul 17 09:15:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomer Maimon X-Patchwork-Id: 12920490 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 817E0C43334 for ; Sun, 17 Jul 2022 09:18:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=JwhpLXv2onXK7Hp90RMBso4h+QLOgiqScBNViSfrbbQ=; b=iIX2Fuy0yaxj8k UeuremWArM+2tGda7ya9X75AqZaTPR0oEzfwInpy8aB4AM9J0OaAtq/JP/Hn6Vmx2jNJa3jph9odj LeBHkMle57GXB3wleqbNk4tECN8R7SVIjX1iCNkGWCmx+H5i2yXBwZRnKUdMPf8zBCMx8e62VcTnY Oh7wiH+x+9s8lEv2MEnMF7XzqeghIxWYyP1OVYRhRVSqM7bgBsvEgw3B0rxry/m/1Q5n8MlrQsub7 vEvSaA6+1FWqqmpsqSTE6UD49S8Wf+nYxkdsCd5ZRNWBwmyv6yzxhKMF21Z1zSrOTAdfdlU41aIIU rSBsL/BUc34Ei8CdD28A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oD0Od-00625V-4q; Sun, 17 Jul 2022 09:17:03 +0000 Received: from maillog.nuvoton.com ([202.39.227.15]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oD0O8-0061rQ-FM for linux-arm-kernel@lists.infradead.org; Sun, 17 Jul 2022 09:16:35 +0000 Received: from NTHCCAS01.nuvoton.com (NTHCCAS01.nuvoton.com [10.1.8.28]) by maillog.nuvoton.com (Postfix) with ESMTP id DD3AA1C8115D; Sun, 17 Jul 2022 17:16:26 +0800 (CST) Received: from NTHCCAS01.nuvoton.com (10.1.8.28) by NTHCCAS01.nuvoton.com (10.1.8.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.7; Sun, 17 Jul 2022 17:16:26 +0800 Received: from taln60.nuvoton.co.il (10.191.1.180) by NTHCCAS01.nuvoton.com (10.1.12.25) with Microsoft SMTP Server id 15.1.2375.7 via Frontend Transport; Sun, 17 Jul 2022 17:16:26 +0800 Received: by taln60.nuvoton.co.il (Postfix, from userid 10070) id 3AB2763A23; Sun, 17 Jul 2022 12:16:25 +0300 (IDT) From: Tomer Maimon To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , Tomer Maimon Subject: [PATCH v9 00/16] Introduce Nuvoton Arbel NPCM8XX BMC SoC Date: Sun, 17 Jul 2022 12:15:53 +0300 Message-ID: <20220717091609.122968-1-tmaimon77@gmail.com> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220717_021632_867990_0B5ABA7C X-CRM114-Status: GOOD ( 13.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patchset adds initial support for the Nuvoton Arbel NPCM8XX Board Management controller (BMC) SoC family. The Nuvoton Arbel NPCM8XX SoC is a fourth-generation BMC. The NPCM8XX computing subsystem comprises a quadcore ARM Cortex A35 ARM-V8 architecture. This patchset adds minimal architecture and drivers such as: Clocksource, Clock, Reset, and WD. Some of the Arbel NPCM8XX peripherals are based on Poleg NPCM7XX. This patchset was tested on the Arbel NPCM8XX evaluation board. Addressed comments from: - Stephen Boyd: https://www.spinics.net/lists/arm-kernel/msg996551.html Changes since version 8: - NPCM8XX clock driver - Move configuration place. - Add space before and aftre '{' '}'. - Handle devm_of_clk_add_hw_provider function error. Changes since version 7: - NPCM8XX clock driver - The clock and reset registers using the same memory region, due to it the clock driver should claim the ioremap directly without checking the memory region. Changes since version 6: - NPCM reset driver - Modify warning message. - dt-bindings: serial: 8250: Add npcm845 compatible string patch accepted, due to it the patch removed from the patchset. Changes since version 5: - NPCM8XX clock driver - Remove refclk if devm_of_clk_add_hw_provider function failed. - NPCM8XX clock source driver - Remove NPCM8XX TIMER_OF_DECLARE support, using the same as NPCM7XX. Changes since version 4: - NPCM8XX clock driver - Use the same quote in the dt-binding file. Changes since version 3: - NPCM8XX clock driver - Rename NPCM8xx clock dt-binding header file. - Remove unused structures. - Improve Handling the clocks registration. - NPCM reset driver - Add ref phandle to dt-binding. Changes since version 2: - Remove NPCM8xx WDT compatible patch. - Remove NPCM8xx UART compatible patch. - NPCM8XX clock driver - Add debug new line. - Add 25M fixed rate clock. - Remove unused clocks and clock name from dt-binding. - NPCM reset driver - Revert to npcm7xx dt-binding. - Skip dt binding quotes. - Adding DTS backward compatibility. - Remove NPCM8xx binding include file. - Warp commit message. - NPCM8XX device tree: - Remove unused clock nodes (used in the clock driver) - Modify gcr and rst node names. Changes since version 1: - NPCM8XX clock driver - Modify dt-binding. - Remove unsed definition and include. - Include alphabetically. - Use clock devm. - NPCM reset driver - Modify dt-binding. - Modify syscon name. - Add syscon support to NPCM7XX dts reset node. - use data structure. - NPCM8XX device tree: - Modify evb compatible name. - Add NPCM7xx compatible. - Remove disable nodes from the EVB DTS. Tomer Maimon (16): dt-bindings: timer: npcm: Add npcm845 compatible string dt-bindings: watchdog: npcm: Add npcm845 compatible string dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock clk: npcm8xx: add clock controller dt-bindings: reset: npcm: add GCR syscon property ARM: dts: nuvoton: add reset syscon property reset: npcm: using syscon instead of device data dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: Add NPCM8XX support dt-bindings: arm: npcm: Add maintainer dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: defconfig: Add Nuvoton NPCM family support .../devicetree/bindings/arm/npcm/npcm.yaml | 7 + .../bindings/arm/npcm/nuvoton,gcr.yaml | 2 + .../bindings/clock/nuvoton,npcm845-clk.yaml | 49 ++ .../bindings/reset/nuvoton,npcm750-reset.yaml | 10 +- .../bindings/timer/nuvoton,npcm7xx-timer.yaml | 2 + .../bindings/watchdog/nuvoton,npcm-wdt.txt | 3 +- MAINTAINERS | 2 + arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 1 + arch/arm64/Kconfig.platforms | 11 + arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/nuvoton/Makefile | 2 + .../dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 170 +++++ .../boot/dts/nuvoton/nuvoton-npcm845-evb.dts | 30 + .../boot/dts/nuvoton/nuvoton-npcm845.dtsi | 76 +++ arch/arm64/configs/defconfig | 3 + drivers/clk/Kconfig | 6 + drivers/clk/Makefile | 1 + drivers/clk/clk-npcm8xx.c | 610 ++++++++++++++++++ drivers/reset/reset-npcm.c | 207 +++++- .../dt-bindings/clock/nuvoton,npcm845-clk.h | 49 ++ 20 files changed, 1206 insertions(+), 36 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml create mode 100644 arch/arm64/boot/dts/nuvoton/Makefile create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts create mode 100644 arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi create mode 100644 drivers/clk/clk-npcm8xx.c create mode 100644 include/dt-bindings/clock/nuvoton,npcm845-clk.h