mbox series

[v4,00/13] ARM: Add Rockchip RV1126 support

Message ID 20220907160207.3845791-1-jagan@edgeble.ai (mailing list archive)
Headers show
Series ARM: Add Rockchip RV1126 support | expand

Message

Jagan Teki Sept. 7, 2022, 4:01 p.m. UTC 
RV1126 is a high-performance vision processor SoC for IPC/CVR,
especially for AI related application.

It is based on quad-core ARM Cortex-A7 32-bit core which integrates
NEON and FPU. There is a 32KB I-cache and 32KB D-cache for each core
and 512KB unified L2 cache. It has build-in NPU supports INT8/INT16
hybrid operation and computing power is up to 2.0TOPs.

This patch series add basic core support for Rockchip RV1126 and
v3 for the series can be found at [1].

Tested in Edgeble AI Edge Compute Module 0.

[1] https://patchwork.kernel.org/project/linux-arm-kernel/cover/20220818124132.125304-1-jagan@edgeble.ai/

Any inputs?
Jagan.

Elaine Zhang (1):
  clk: rockchip: Add MUXTBL variant

Jagan Teki (12):
  i2c: rk3x: Add rv1126 support
  clk: rockchip: Add dt-binding header for RV1126
  dt-bindings: clock: rockchip: Document RV1126 CRU
  clk: rockchip: Add clock controller support for RV1126 SoC.
  dt-bindings: soc: rockchip: Document RV1126 grf
  dt-bindings: soc: rockchip: Document RV1126 pmugrf
  ARM: dts: rockchip: Add Rockchip RV1126 pinctrl
  ARM: dts: rockchip: Add Rockchip RV1126 SoC
  dt-bindings: vendor-prefixes: Add Edgeble AI Technologies Pvt. Ltd.
  dt-bindings: arm: rockchip: Add Edgeble AI Edge Compute Module 0 Carrier
  ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0
  ARM: dts: rockchip: rv1126: Add Edgeble AI Edge Compute Module 0 Carrier

 .../devicetree/bindings/arm/rockchip.yaml     |    6 +
 .../bindings/clock/rockchip,rv1126-cru.yaml   |   62 +
 .../devicetree/bindings/soc/rockchip/grf.yaml |    2 +
 .../devicetree/bindings/vendor-prefixes.yaml  |    2 +
 MAINTAINERS                                   |    2 +-
 arch/arm/boot/dts/Makefile                    |    1 +
 .../boot/dts/rv1126-edgeble-ecm0-carrier.dts  |   38 +
 .../rv1126-edgeble-edge-compute-module-0.dtsi |  353 ++++++
 arch/arm/boot/dts/rv1126-pinctrl.dtsi         |  212 ++++
 arch/arm/boot/dts/rv1126.dtsi                 |  430 +++++++
 drivers/clk/rockchip/Kconfig                  |    7 +
 drivers/clk/rockchip/Makefile                 |    1 +
 drivers/clk/rockchip/clk-rv1126.c             | 1107 +++++++++++++++++
 drivers/clk/rockchip/clk.c                    |   27 +-
 drivers/clk/rockchip/clk.h                    |   36 +
 drivers/i2c/busses/i2c-rk3x.c                 |    9 +
 .../dt-bindings/clock/rockchip,rv1126-cru.h   |  632 ++++++++++
 17 files changed, 2920 insertions(+), 7 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml
 create mode 100644 arch/arm/boot/dts/rv1126-edgeble-ecm0-carrier.dts
 create mode 100644 arch/arm/boot/dts/rv1126-edgeble-edge-compute-module-0.dtsi
 create mode 100644 arch/arm/boot/dts/rv1126-pinctrl.dtsi
 create mode 100644 arch/arm/boot/dts/rv1126.dtsi
 create mode 100644 drivers/clk/rockchip/clk-rv1126.c
 create mode 100644 include/dt-bindings/clock/rockchip,rv1126-cru.h

Comments

Heiko Stübner Sept. 13, 2022, 10:11 a.m. UTC | #1 
On Wed, 7 Sep 2022 21:31:54 +0530, Jagan Teki wrote:
> RV1126 is a high-performance vision processor SoC for IPC/CVR,
> especially for AI related application.
> 
> It is based on quad-core ARM Cortex-A7 32-bit core which integrates
> NEON and FPU. There is a 32KB I-cache and 32KB D-cache for each core
> and 512KB unified L2 cache. It has build-in NPU supports INT8/INT16
> hybrid operation and computing power is up to 2.0TOPs.
> 
> [...]

Applied, thanks!

[02/13] clk: rockchip: Add MUXTBL variant
        commit: 30d8b7d43c840f5907c0e688d41093f176ba8ac1
[06/13] dt-bindings: soc: rockchip: Document RV1126 grf
        commit: 26d8b279392ca93d9b725a3a05f6058db514b244
[07/13] dt-bindings: soc: rockchip: Document RV1126 pmugrf
        commit: 614ce48b63c80ddfb627c21f936675a702498528

Best regards,