From patchwork Tue Sep 13 09:44:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 12974629 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DC474C54EE9 for ; Tue, 13 Sep 2022 09:46:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=n0ozomA5An/+dvw7ooTFOB2+oyc/1Z2gXjillzJaODU=; b=muQKEvwIcktE4p nf+cEgF9Ll5okjn8NWoYd//oVqHUy3qHsyyCYP9k1OaOmMgaKLTE5tAjmJ6wURd3WgI+NJrvqZTiw eGZGW2o7CE7OpsaptGZbgO8G2/cQjXCAp5bYZqJbHd/UBj5rJygxPF2iQdjimyjX1zqRqDQMAlPH5 TJDaYK9o6BvNLLphxv79DG3OARMU34PVsIO2wjxQ7WGrLEC7+A+C9Kou2pZ8OJ6iILrHCybUcWBaJ WUL69URcGyL9AHgkoZ6tkt5MUr+zlihqd1IOAp+pxO4CHaaWUBwIVS+Vohy/CAYxGmXOpo73lsFtY kH5VejYbv0Dx4PYSZxCw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oY2TX-005RBf-PV; Tue, 13 Sep 2022 09:45:03 +0000 Received: from out0.migadu.com ([2001:41d0:2:267::]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oY2TS-005Qqp-Hn for linux-arm-kernel@lists.infradead.org; Tue, 13 Sep 2022 09:45:00 +0000 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1663062290; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=KxRL7D9m29hUiUTS4dxIxei/v3WjORArYpVDuknUprY=; b=I4N2H8wz/zJQGBqTo0ob43uuTm7abg5Uld1HFUnzo7Cl6zCxA17KpWVsWqKvl3BNdasgid Fiv8Y5My5cyPYrAf8gFOfcX5Kq6NJC1/svYhF7usaBgqIk8Lba7MZtcHXI337aoHRxG5lx L5iBJojrwJvhywU3NKrTtIo2lvPEVUQ= From: Oliver Upton To: Marc Zyngier , James Morse , Alexandru Elisei Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, Reiji Watanabe , Andrew Jones , Oliver Upton Subject: [PATCH v3 0/7] KVM: arm64: Use visibility hook to treat ID regs as RAZ Date: Tue, 13 Sep 2022 09:44:33 +0000 Message-Id: <20220913094441.3957645-1-oliver.upton@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Migadu-Auth-User: linux.dev X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220913_024458_761547_B315D41E X-CRM114-Status: UNSURE ( 8.85 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org For reasons unknown, the Arm architecture defines the 64-bit views of the 32-bit ID registers as UNKNOWN [1]. This combines poorly with the fact that KVM unconditionally exposes these registers to userspace, which could throw a wrench in migration between 64-bit only systems. This series reworks KVM's definition of these registers to RAZ/WI with the goal of providing consistent register values across 64-bit machines. Patches 1-3 clean up the ID register accessors, taking advantage of the fact that the generic accessors know how to handle RAZ. Patches 4-6 start switch the handling of potentially nonzero AArch32 ID registers to RAZ/WI. RAZ covers up the architecturally UNKNOWN values, and WI allows for migration off of kernels that may provide garbage. Note that hidden AArch32 ID registers continue to have RAZ behavior with the additional expectation of invariance. Lastly, patch 7 includes a small test for the issue. Applies to 6.0-rc3. Tested with KVM selftests under the fast model w/ asymmetric 32 bit support and no 32 bit support whatsoever. [1]: DDI0487H.a Table D12-2 'Instruction encodings for non-Debug System Register accesses' v2: https://lore.kernel.org/kvmarm/20220902154804.1939819-1-oliver.upton@linux.dev/ v2 -> v3: - Collect more of Reiji's r-bs (thanks again!) - Test the RAZ+invariant registers (AFR0, DFR1, unallocated AA32 ID registers) (Drew) - Give the selftest a more sensible name v1 -> v2: - Collect Reiji's r-b tags (thanks!) - Call sysreg_visible_as_raz() from read_id_reg() (Reiji) - Hoist sysreg_user_write_ignore() into kvm_sys_reg_set_user() (Reiji) Oliver Upton (7): KVM: arm64: Use visibility hook to treat ID regs as RAZ KVM: arm64: Remove internal accessor helpers for id regs KVM: arm64: Drop raz parameter from read_id_reg() KVM: arm64: Spin off helper for calling visibility hook KVM: arm64: Add a visibility bit to ignore user writes KVM: arm64: Treat 32bit ID registers as RAZ/WI on 64bit-only system KVM: selftests: Add test for AArch32 ID registers arch/arm64/kvm/sys_regs.c | 150 ++++++++-------- arch/arm64/kvm/sys_regs.h | 24 ++- tools/testing/selftests/kvm/.gitignore | 1 + tools/testing/selftests/kvm/Makefile | 1 + .../selftests/kvm/aarch64/aarch32_id_regs.c | 169 ++++++++++++++++++ 5 files changed, 259 insertions(+), 86 deletions(-) create mode 100644 tools/testing/selftests/kvm/aarch64/aarch32_id_regs.c base-commit: b90cb1053190353cc30f0fef0ef1f378ccc063c5