[RESEND,v6,0/1] ARM: mstar: cpupll

Message

Romain Perier Oct. 5, 2022, 8:53 a.m. UTC

This is a resend of the remaining patches of this series. I have kept
the cover letter in order to do not loose context of the previous series.

This series adds a basic driver for the PLL that generates
the cpu clock on MStar/SigmaStar ARMv7 SoCs.

Unfortunately there isn't much documentation for this thing
so there are few magic values and guesses.

This needs to come after the MPLL DT changes.

Changes since v5:
- Fixed tags for Willy
- Add missing kernel.h and device.h
- Use devm_of_clk_add_hw_provider
- Move "cpupll_parent" on the stack as it is only used by
  devm_clk_hw_register (it seems safe).

Changes since v4:
- Removed merged patches (dt-bindings documentation and dt-bindings)
- Rebased onto 5.19

Changes since v3:
- Added Reviewed-by on Daniel's patches
- Removed "[PATCH v3 8/9] ARM: mstar: Add OPP table for mercury5"

Changes since v2:
- Re-ordered Kconfig by name
- Re-ordered includes alphabetically and removed useless ones
- Used timeout for cpu_relax
- Returned DIV_ROUND_DOWN_ULL() directly in
  msc313_cpupll_frequencyforreg()
- Returned DIV_ROUND_DOWN_ULL() directly in
  msc313_cpupll_regforfrequecy()
- Reduced the number of lines for msc313_cpupll_of_match
- Removed CLK_IS_CRITICAL

Changes since v1:
- Re-worked the series and ensure that 'make dt_binding_check' passes.
  The required commit is merged now, so it is okay.
- Fixed coding style issues in the driver and makes check_patch.pl happy
- Added one more commit for extending the opp_table for infinity2m.

Daniel Palmer (1):
  clk: mstar: msc313 cpupll clk driver

 drivers/clk/mstar/Kconfig             |   7 +
 drivers/clk/mstar/Makefile            |   1 +
 drivers/clk/mstar/clk-msc313-cpupll.c | 220 ++++++++++++++++++++++++++
 3 files changed, 228 insertions(+)
 create mode 100644 drivers/clk/mstar/clk-msc313-cpupll.c