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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: xTC9dme1fy+S1qXFHLuAT04tr27OrVR4ecSBlSj7DH0thLiJdzbb4SFBYvhNRfPYEZwCZa+GNswU+IaFBWXjmaxfiUvYwrDPF/kzukPygBapqXBqGs8NPconZr9FhCeQlKnqVdt03wIX6GpJFDKKtMvq25wvRX+1+ESBW6K9kp/k6xiUcXkADL9ZTayaAdDiZmavtpA0pUL3+D9Di2QwpgdmTjsZc08RpEjmdlN9i9bI1giR0MeGYYtv+fIXtgfoPmUIPXvlWFRL+D4OeL0MYrCpjg+LfOKwOxgK3IN0sYTwlUPh3g8FF1lYT/wwMrXK+6DsQaRf9Fbhjhk1XB9r+kfP9UvfHrNUPObRkRVOe3JCLy0LR210juJPVj3UzHIiEv/sC/9CknEeSIFODFN+3pvuA4xTSamDLlaFqpqh65kiJ2yFJB+mIk3zIl3cq8m4mxfH3ND7UyxvrvUNyBbqGQS+uMIDR5Ti3sqhmKO+ARsTCPkmrDrGtyd5Ab8PX3plmPpmG83NpkVljd249MkHdLJo1N+cIkeymzs22C9mdojmUppAdlPVG8wK8gDzNDNQxvYDKhSyI8pIoMCxdQ9ecr5lHAd6tPI2YPMecUJdFSK3AQYG8s77G9FF3eKv/e5yKVh+jOlYVfGR1fA/E5h4h8k73r9oqBGpc2Yxj4GU6V4uOQ2AfEyt8O21U9JVUFiakoxA4LHoM5bxuNJVEPcUhhmwlQpnQCOq3Rdc8bTTsmGJJDx3MRr1xL7j9FZXlIXTaldFpN7aXmFHvG44MW3Uc2ZZPO3phxFZ/gW49eTDuTxzJRErQGOg9zJU6A4zVilXEgrga4jtZXvOrdqsFTMzJgbU3kdBtXq5npYTleEJczpMBaTWTx2h6oeVA0RQFn3HlwVmHnmClr720C5FgfnCpEDRB1SW4+eFGkuw7JuvpZBuhlzCXEXpSTylgVRFzgtFgB+0Gxf2143rCUv7lXwgLgMIYWsME7og/Hr/i2rXjV0JwSQzWitUNK20bk8yk8Ui9Xh++uO+ciGnExu0E6c8mq6U9zFCIu+kC3F/F2HLGNLwF4WIn/ZpMyLw3gx/uoMj47WChVBcdridUa2Bdg2gCuogvEozqSeW9RXjYwxtcaCAS1hoWr9TRdNPWehyX2+vWJ5k//70Nweev7azzpWhOcyvKEfG2msSmWVR4kL95zCPFr9C46mLIzJi+ayG/Ve4lFc1ha6oJbrTRll89G0MDFQGuYclnYgsyZ0z0GXC4lC4npSNPJYQ4pOQC8n3NepEZmdCGeHoGWl0xtxYOqTJG2vIqJPDxR43Vq8YGekzEnyFfqfkszvqha8xY+cuoZo80mDnyRww7NWYqYi0MKrTggZfFGhiCq8OmQ92IeQwhMcwglOL/A15j86yepQbedCU7sAAy1sYn7E9bP40eCTCJ2og3CWjrS21zVyJzEi5MwVszhNfX41Totc+mvjtrjdveLUZ+mp0qubY52DHXHKQjyK5dd8pxGN8Y9UnrlmLaOrryrTHW9kN2gEKqJAfybR7+tj7m4bJYq3rU3wtUyykiA4C63PdX+zR4qrbXdHafTE= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7eaf5540-9df0-486d-71d5-08dabb27ef42 X-MS-Exchange-CrossTenant-AuthSource: VI1PR0402MB3439.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Oct 2022 10:09:01.9980 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ZsXb5zyGO7tuX6XBW5FKlaXAKwfnhPiv7uxrwbm/L9B4MUHKXNw+LU9gq+ALXirK X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR04MB8886 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221031_030907_804811_CAAC1F76 X-CRM114-Status: GOOD ( 12.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello, Here I want to introduce a new patch series, which aims to support IOMUX functions provided by SIUL2 [System Integration Unit Lite2] on S32 SoCs, such as S32G2. This series is originally from NXP's implementation on CodeAurora[1] and it will be required by upstream kernel for supporting a variety of devices on S32 SoCs which need to config PINMUXs, such as PHYs and MAC controllers. Currently, the whole architecture relies on FDTs offered by ATF[3] on CodeAurora to keep the flexibility of handling multiple S32 platforms since now S32 clks can be triggered via the ARM SCMI clock protocol and clk IDs/ settings can vary according to different board designs. To ensure that the driver can work properly, the dt-binding schemas in this patchset are still required as references. Thanks, Chester [1] https://source.codeaurora.org/external/autobsps32/linux/tree/drivers/pinctrl/freescale?h=bsp34.0-5.10.120-rt [2] https://source.codeaurora.org/external/autobsps32/arm-trusted-firmware/tag/?h=bsp34.0-2.5 Chester Lin (2): dt-bindings: pinctrl: add schema for NXP S32 SoCs pinctrl: add NXP S32 SoC family support .../pinctrl/nxp,s32cc-siul2-pinctrl.yaml | 91 ++ drivers/pinctrl/freescale/Kconfig | 16 + drivers/pinctrl/freescale/Makefile | 2 + drivers/pinctrl/freescale/pinctrl-s32.h | 65 ++ drivers/pinctrl/freescale/pinctrl-s32cc.c | 1023 +++++++++++++++++ drivers/pinctrl/freescale/pinctrl-s32g.c | 759 ++++++++++++ 6 files changed, 1956 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/nxp,s32cc-siul2-pinctrl.yaml create mode 100644 drivers/pinctrl/freescale/pinctrl-s32.h create mode 100644 drivers/pinctrl/freescale/pinctrl-s32cc.c create mode 100644 drivers/pinctrl/freescale/pinctrl-s32g.c