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[46.135.44.69]) by smtp.gmail.com with ESMTPSA id ha7-20020a170906a88700b007c0bb571da5sm1206762ejb.41.2022.12.02.03.52.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Dec 2022 03:52:33 -0800 (PST) From: Tomeu Vizoso To: Cc: italonicola@collabora.com, Tomeu Vizoso , Christian Gmeiner , Daniel Vetter , David Airlie , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), dri-devel@lists.freedesktop.org (open list:DRM DRIVERS FOR VIVANTE GPU IP), etnaviv@lists.freedesktop.org (moderated list:DRM DRIVERS FOR VIVANTE GPU IP), Jerome Brunet , Kevin Hilman , Krzysztof Kozlowski , linux-amlogic@lists.infradead.org (open list:ARM/Amlogic Meson SoC support), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Amlogic Meson SoC support), linux-kernel@vger.kernel.org (open list), Lucas Stach , Martin Blumenstingl , Neil Armstrong , Philipp Zabel , Rob Herring , Russell King Subject: [PATCH v6 0/8] Support for the NPU in Vim3 Date: Fri, 2 Dec 2022 12:52:12 +0100 Message-Id: <20221202115223.39051-1-tomeu.vizoso@collabora.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221202_035237_693621_A5D2A59C X-CRM114-Status: GOOD ( 11.84 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, This series adds support for the Verisilicon VIPNano-QI NPU in the A311D as in the VIM3 board. The IP is very closely based on previous Vivante GPUs, so the etnaviv kernel driver works basically unchanged. The userspace part of the driver is being reviewed at: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18986 v2: Move reference to RESET_NNA to npu node (Neil) v3: Fix indentation mistake (Neil) v4: Add warning when etnaviv probes on a NPU (Lucas) v5: Reorder HWDB commit to be the last (Lucas) v6: Add patch to move the power domain to the SoC-specific dtsi (Neil) Regards, Tomeu Tomeu Vizoso (8): dt-bindings: reset: meson-g12a: Add missing NNA reset dt-bindings: power: Add G12A NNA power domain soc: amlogic: meson-pwrc: Add NNA power domain for A311D arm64: dts: Add DT node for the VIPNano-QI on the A311D drm/etnaviv: Add nn_core_count to chip feature struct drm/etnaviv: Warn when probing on NPUs drm/etnaviv: add HWDB entry for VIPNano-QI.7120.0055 arm64: dts: Fix NPU power domain references in Amlogic G12-based SoCs .../boot/dts/amlogic/meson-g12-common.dtsi | 9 +++++ .../amlogic/meson-g12b-a311d-khadas-vim3.dts | 4 +++ arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 4 +++ arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 +++ drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 4 +++ drivers/gpu/drm/etnaviv/etnaviv_gpu.h | 3 ++ drivers/gpu/drm/etnaviv/etnaviv_hwdb.c | 35 +++++++++++++++++++ drivers/soc/amlogic/meson-ee-pwrc.c | 17 +++++++++ include/dt-bindings/power/meson-g12a-power.h | 1 + .../reset/amlogic,meson-g12a-reset.h | 4 ++- 10 files changed, 84 insertions(+), 1 deletion(-)