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Fri, 30 Dec 2022 01:54:59 -0800 (PST) Received: from fedora.flets-east.jp ([2400:4050:c360:8200:8ae8:3c4:c0da:7419]) by smtp.gmail.com with ESMTPSA id b7-20020a170902650700b00189c536c72asm14487719plk.148.2022.12.30.01.54.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Dec 2022 01:54:59 -0800 (PST) From: Akihiko Odaki To: Cc: Mark Brown , Marc Zyngier , linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, Mathieu Poirier , Oliver Upton , Suzuki K Poulose , Alexandru Elisei , James Morse , Will Deacon , Catalin Marinas , asahi@lists.linux.dev, Alyssa Rosenzweig , Sven Peter , Hector Martin , Akihiko Odaki Subject: [PATCH v5 0/7] KVM: arm64: Normalize cache configuration Date: Fri, 30 Dec 2022 18:54:45 +0900 Message-Id: <20221230095452.181764-1-akihiko.odaki@daynix.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221230_015505_788955_A84CC330 X-CRM114-Status: GOOD ( 11.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Before this change, the cache configuration of the physical CPU was exposed to vcpus. This is problematic because the cache configuration a vcpu sees varies when it migrates between vcpus with different cache configurations. Fabricate cache configuration from the sanitized value, which holds the CTR_EL0 value the userspace sees regardless of which physical CPU it resides on. V4 -> V5: - Noted why cache level existence check is unnecessary when fabricating CCSIDR_EL1 value. - Removed FWB check. It is necessary as CLIDR_EL1.{LoUU, LoIUS} on the host are {0, 0} if FWB is enabled, and such a CLIDR_EL1 value sets the IDC bit of the sanitized CTR_EL0 value, which is already checked. - Removed UNDEF injection when reading CCSIDR_EL1 with an invalid CSSELR_EL1 value. - Added a check for CLIDR_EL1.{LoUU,LoC,LoUIS} values set from the userspace. V3 -> V4: - Implemented UNKNOWN system register definition for CCSIDR_EL1 - Added a comment about the relation between CCSIDR_EL1 and FEAT_CCIDX - Squashed "Normalize cache configuration" and "Allow user to set CCSIDR_EL1" The intermediate state between them did not make much sense. - Introduced FIELD_GET to extract CCSIDR_EL1_LineSize. V2 -> V3: - Corrected message for patch "Normalize cache configuration" - Split patch "Normalize cache configuration" - Added handling for CSSELR_EL1.TnD - Added code to ignore RES0 in CSSELR_EL1 - Replaced arm64_ftr_reg_ctrel0.sys_val with read_sanitised_ftr_reg(SYS_CTR_EL0) - Fixed vcpu->arch.ccsidr initialziation - Added CCSIDR_EL1 sanitization - Added FWB check - Added a comment for CACHE_TYPE_SEPARATE - Added MTE tag cache creation code for CLIDR_EL1 fabrication - Removed CLIDR_EL1 reset code for reset caused by guest - Added a comment for CCSIDR2 V2: https://lore.kernel.org/lkml/20221211051700.275761-2-akihiko.odaki@daynix.com/ V1: https://lore.kernel.org/lkml/525ff263-90b3-5b12-da31-171b09f9ad1b@daynix.com/ Akihiko Odaki (6): arm64/sysreg: Convert CCSIDR_EL1 to automatic generation arm64/sysreg: Add CCSIDR2_EL1 arm64/cache: Move CLIDR macro definitions KVM: arm64: Always set HCR_TID2 KVM: arm64: Mask FEAT_CCIDX KVM: arm64: Normalize cache configuration Marc Zyngier (1): arm64: Allow the definition of UNKNOWN system register fields arch/arm64/include/asm/cache.h | 9 + arch/arm64/include/asm/kvm_arm.h | 3 +- arch/arm64/include/asm/kvm_emulate.h | 4 - arch/arm64/include/asm/kvm_host.h | 6 +- arch/arm64/include/asm/sysreg.h | 1 - arch/arm64/kernel/cacheinfo.c | 5 - arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 2 - arch/arm64/kvm/reset.c | 1 + arch/arm64/kvm/sys_regs.c | 256 +++++++++++++-------- arch/arm64/tools/gen-sysreg.awk | 20 +- arch/arm64/tools/sysreg | 17 ++ 11 files changed, 212 insertions(+), 112 deletions(-)