Message ID | 20230112023852.42012-1-akihiko.odaki@daynix.com (mailing list archive) |
---|---|
Headers | show |
Series | KVM: arm64: Normalize cache configuration | expand |
On Thu, 12 Jan 2023 11:38:45 +0900, Akihiko Odaki wrote: > Before this change, the cache configuration of the physical CPU was > exposed to vcpus. This is problematic because the cache configuration a > vcpu sees varies when it migrates between vcpus with different cache > configurations. > > Fabricate cache configuration from the sanitized value, which holds the > CTR_EL0 value the userspace sees regardless of which physical CPU it > resides on. > > [...] Applied to kvmarm/next, thanks! [1/7] arm64: Allow the definition of UNKNOWN system register fields https://git.kernel.org/kvmarm/kvmarm/c/e2c0b51f1c9d [2/7] arm64/sysreg: Convert CCSIDR_EL1 to automatic generation https://git.kernel.org/kvmarm/kvmarm/c/d1a0eb124c44 [3/7] arm64/sysreg: Add CCSIDR2_EL1 https://git.kernel.org/kvmarm/kvmarm/c/8f407d6a15f3 [4/7] arm64/cache: Move CLIDR macro definitions https://git.kernel.org/kvmarm/kvmarm/c/805e6ec1c5e0 [5/7] KVM: arm64: Always set HCR_TID2 https://git.kernel.org/kvmarm/kvmarm/c/8cc6dedaff42 [6/7] KVM: arm64: Mask FEAT_CCIDX https://git.kernel.org/kvmarm/kvmarm/c/bf48040cd9b0 [7/7] KVM: arm64: Normalize cache configuration https://git.kernel.org/kvmarm/kvmarm/c/7af0c2534f4c -- Best, Oliver