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[2a01:c22:7ae1:c100::e63]) by smtp.googlemail.com with ESMTPSA id d7-20020a50fb07000000b0049cbd334b13sm1967620edq.29.2023.01.14.15.35.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Jan 2023 15:35:03 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, neil.armstrong@linaro.org, devicetree@vger.kernel.org, Martin Blumenstingl Subject: [PATCH v1 0/2] ARM: dts: meson: Add more L2 (PL310) cache properties Date: Sun, 15 Jan 2023 00:34:53 +0100 Message-Id: <20230114233455.2005047-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.39.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230114_153508_692502_E08B6BB7 X-CRM114-Status: GOOD ( 10.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org I had these patches in my testing tree for a while now. The vendor kernel uses the same configuration, so it probably makes sense to use them upstream as well. Martin Blumenstingl (2): ARM: dts: meson8: Add more L2 (PL310) cache properties ARM: dts: meson8b: Add more L2 (PL310) cache properties arch/arm/boot/dts/meson8.dtsi | 3 +++ arch/arm/boot/dts/meson8b.dtsi | 3 +++ 2 files changed, 6 insertions(+)