From patchwork Mon Jan 23 12:40:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 13112080 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C568EC38142 for ; Mon, 23 Jan 2023 12:43:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=G2SHRN0SCjaYzYOG8UITuMXU1U3oFDPAx466L/bb780=; b=1tgfPtg7v2yLM4 IP7C7DDbaPw6X9s/zov/lrgGcVJyHaRSGF8Qdzm0KKp+mY4n3c3gjTQRY5voISvZS/d8NnsxIFRMz O71uukUZakHZxVNOarx58Lsw3AXy0d8LjOyUvp8Za5NL/GrOfxeK99ji14Rky44usnVV2FU+l/crp yesI7mGPKBnR3+SPlm9ZiQvGM6uWdkwMp2nSFzq+y6MpVU/m2zSbSeErYi4T5JW4lOacB/V3O+Drx xtDAi3ocp2HUeiUIDdN760OyVxJo5YRjjYGgtGBISG/96tO76ybm0bF4QEI76MqpSFiXU6ulDHOcS O3SAyn9AwNShGBRvUdcg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pJw9y-00HB23-5R; Mon, 23 Jan 2023 12:42:50 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pJw88-00HANY-16 for linux-arm-kernel@lists.infradead.org; Mon, 23 Jan 2023 12:40:57 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3BF62AD7; Mon, 23 Jan 2023 04:41:33 -0800 (PST) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A043C3F64C; Mon, 23 Jan 2023 04:40:50 -0800 (PST) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: broonie@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, maz@kernel.org, will@kernel.org Subject: [PATCH 0/4] arm64: pseudo-nmi: elide code when CONFIG_ARM64_PSEUDO_NMI=n Date: Mon, 23 Jan 2023 12:40:38 +0000 Message-Id: <20230123124042.718743-1-mark.rutland@arm.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230123_044056_207213_1DB484BF X-CRM114-Status: GOOD ( 12.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series addresses a couple of sub-optimal code generation issues with arm64's pseudo-nmi support code: * Even when CONFIG_ARM64_PSEUDO_NMI=n, we generate alternative code sequences and alt_instr entries which will never be used. This series reworks the irqflags code to use alternative branches (with an IS_ENABLED() check), which allows the alternatives to be elided when CONFIG_ARM64_PSEUDO_NMI=n. * When PMHE is eanbled in HW, we must synchronize PMR updates using a DSB SY. We take pains to avoid this using a static key to skip the barrier when PMHE is not in use, but this results in unnecessarily branchy code. This series replaces the static key with an alternative, allowing the DSB SY to be relaxed to a NOP. These changes make a defconfig kernel a little smaller, and does not adversely affect the size of a CONFIG_ARM64_PSEUDO_NMI=y kernel. The structural changes will also make it easier for a subsequent series to rework the irqflag and daifflag management, addressing some long-standing edge cases and preparing for ARMv8.8-A's FEAT_NMI. I've tested this series under a QEM KVM VM on a ThunderX2 host, and a QEMU TCG VM on an x86_64 host. I've tested with and without pseudo-NMI support enabled, and with pseudo-NMI debug and lockdep enabled, using perf record in system-wide mode. Thanks, Mark. Mark Rutland (4): arm64: rename ARM64_HAS_SYSREG_GIC_CPUIF to ARM64_HAS_GIC_SYSREG_CPUIF arm64: rename ARM64_HAS_IRQ_PRIO_MASKING to ARM64_HAS_GIC_PRIO_MASKING arm64: add ARM64_HAS_GIC_PRIO_NO_PMHE cpucap arm64: irqflags: use alternative branches for pseudo-NMI logic arch/arm/include/asm/arch_gicv3.h | 5 + arch/arm64/include/asm/arch_gicv3.h | 5 + arch/arm64/include/asm/barrier.h | 11 +- arch/arm64/include/asm/cpufeature.h | 2 +- arch/arm64/include/asm/irqflags.h | 183 +++++++++++++++++++--------- arch/arm64/include/asm/ptrace.h | 2 +- arch/arm64/kernel/cpufeature.c | 26 +++- arch/arm64/kernel/entry.S | 25 ++-- arch/arm64/kernel/image-vars.h | 2 - arch/arm64/tools/cpucaps | 5 +- drivers/irqchip/irq-gic-v3.c | 19 +-- drivers/irqchip/irq-gic.c | 2 +- 12 files changed, 188 insertions(+), 99 deletions(-)