[0/2] Add MHUv2 support for multiple rx interrupt

Message

Cristian Marussi March 29, 2023, 3:39 p.m. UTC

Hi,

I was experimenting with a TotalCompute2022 (TC2) [1] reference design
sporting MHUv2 (v2.x) mailboxes and running on top of it an SCMI stack
configured platform-side to use multiple per-protocol channels with
multiple rx interrupts but NOT using a combined interrupt.
(it is not even wired at the hw-level on this platform anyway...)

This configuration seemed not supported by the current driver which
assumes that you have only one rx interrupt, possibly a combined one.

Looking at the MHUv2 spec ([2]/[3] "Channels") seems indeed that
per-channel rx-interrupts are indeed a possibility, beside the combined
one.

This small seriers aims to add such support by simply allowing to
specify multiple rx interrupts in the DT node and taking care to
register the same orginal ISR for all.

On the tx path, instead, I left things unchanged and stuck with the
current approach that just uses one single combined interrupt for the
clear channel interrupt. (if supported at all)

I tested on a TC2 model configured alternatively with MHU v2.1 and v2.0.

Series based on v6.3-rc4.

Any feedback welcome.

Thanks,
Cristian

----
[1]: https://gitlab.arm.com/arm-reference-solutions/arm-reference-solutions-docs/-/blob/master/docs/totalcompute/tc2/tc2_sw_stack.rst
[2]: https://developer.arm.com/documentation/102342/0000/Message-Handling-Unit/About-the-Message-Handling-Unit/Channels?lang=en
[3]: https://developer.arm.com/documentation/101418/0100/Message-Handling-Unit/Message-Handling-Unit-v2/Channel?lang=en


Cristian Marussi (2):
  dt-bindings: mailbox : arm,mhuv2: Allow for more RX interrupts
  mailbox: arm_mhuv2: Add support for multiple rx interrupt

 .../bindings/mailbox/arm,mhuv2.yaml           | 13 +++++---
 drivers/mailbox/arm_mhuv2.c                   | 30 ++++++++++---------
 2 files changed, 25 insertions(+), 18 deletions(-)