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[92.145.124.62]) by smtp.gmail.com with ESMTPSA id w16-20020a05600c475000b003f092f0e0a0sm9350624wmo.3.2023.04.13.09.17.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Apr 2023 09:17:30 -0700 (PDT) From: Alexandre Ghiti To: Jonathan Corbet , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ian Rogers , Paul Walmsley , Palmer Dabbelt , Albert Ou , Atish Patra , Anup Patel , Will Deacon , Rob Herring , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Alexandre Ghiti Subject: [PATCH 0/4] riscv: Allow userspace to directly access perf counters Date: Thu, 13 Apr 2023 18:17:21 +0200 Message-Id: <20230413161725.195417-1-alexghiti@rivosinc.com> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230413_091733_038743_F4ECC683 X-CRM114-Status: GOOD ( 10.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org riscv used to allow direct access to cycle/time/instret counters, bypassing the perf framework, this patchset intends to allow the user to mmap any counter when accessed through perf. But we can't break the existing behaviour so we introduce a sysctl perf_user_access like arm64 does, which defaults to the legacy mode described above. The core of this patchset lies in patch 4, the first 3 patches are simple fixes. base-commit-tag: v6.3-rc1 Alexandre Ghiti (4): perf: Fix wrong comment about default event_idx include: riscv: Fix wrong include guard in riscv_pmu.h riscv: Make legacy counter enum match the HW numbering riscv: Enable perf counters user access only through perf Documentation/admin-guide/sysctl/kernel.rst | 23 +++- arch/riscv/include/asm/perf_event.h | 3 + arch/riscv/kernel/Makefile | 2 +- arch/riscv/kernel/perf_event.c | 65 +++++++++++ drivers/perf/riscv_pmu.c | 42 ++++++++ drivers/perf/riscv_pmu_legacy.c | 24 ++++- drivers/perf/riscv_pmu_sbi.c | 113 ++++++++++++++++++-- include/linux/perf/riscv_pmu.h | 9 +- include/linux/perf_event.h | 3 +- tools/lib/perf/mmap.c | 65 +++++++++++ 10 files changed, 332 insertions(+), 17 deletions(-) create mode 100644 arch/riscv/kernel/perf_event.c