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[0/7] Power down serdes lanes and CMUs initially

Message ID 20230417180335.2787494-1-daniel.machon@microchip.com (mailing list archive)
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Series Power down serdes lanes and CMUs initially | expand

Message

Daniel Machon April 17, 2023, 6:03 p.m. UTC
This patch series aims to lower the power consumption of the Sparx5
switch chip, by configuring optimal quiet mode for serdes lanes, as well
as powering down unused CMUs (Clock Multiplier Unit). Before this series,
serdes lane quiet mode were not optimally configured, and all the CMUs were
powered on by default. This uses needless power.

Each serdes lane is provided a CMU clock, depending on the serdes mode
and the serdes index. CMUs will now be powered on individually, when
needed. The amount of power saved varies, depending on the port
configuration. As a reference, this change saves about 1W on
sparx5_pcb135 and 2W on sparx5_pcb134.

Patch #1: Adds the required registers.
Patch #2: Configures optimal quiet mode for all serdes lanes.
Patch #3: Reorders CMU functions.
Patch #4: Configures CMUs to be powered down by default.

Patch #5: Adds the serdes mode and index to CMU index map, and configures the
          individual CMU when the corresponding serdes lane is configured.

Patch #6: Removes the code that unconditionally powered on all CMUs
Patch #7: Adds a check that serdesmode is not unset when a CMU is configured.

Daniel Machon (7):
  phy: sparx5-serdes: add registers required for SD/CMU power down
  phy: sparx5-serdes: configure optimal qiet mode for serdes lanes
  phy: sparx5-serdes: reorder CMU functions
  phy: sparx5-serdes: power down all CMUs by default
  phy: sparx5-serdes: power on CMUs individually
  phy: sparx5-serdes: remove power up of all CMUs
  phy: sparx5-serdes: do not reconfigure serdes if serdesmode is unset

 drivers/phy/microchip/sparx5_serdes.c      | 426 +++++++++++++--------
 drivers/phy/microchip/sparx5_serdes.h      |   1 -
 drivers/phy/microchip/sparx5_serdes_regs.h | 106 +++++
 3 files changed, 370 insertions(+), 163 deletions(-)

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2.34.1