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[87.5.99.194]) by smtp.gmail.com with ESMTPSA id s12-20020a170906bc4c00b00947ed087a2csm10171360ejv.154.2023.04.27.13.45.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Apr 2023 13:45:43 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: michael@amarulasolutions.com, Amarula patchwork , Dario Binacchi , Alexandre Torgue , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Krzysztof Kozlowski , Marc Kleine-Budde , Maxime Coquelin , Paolo Abeni , Rob Herring , Wolfgang Grandegger , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-can@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org Subject: [PATCH v2 0/5] can: bxcan: add support for single peripheral configuration Date: Thu, 27 Apr 2023 22:45:35 +0200 Message-Id: <20230427204540.3126234-1-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230427_134547_717869_9D84D1EE X-CRM114-Status: GOOD ( 15.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The series adds support for managing bxCAN controllers in single peripheral configuration. Unlike stm32f4 SOCs, where bxCAN controllers are only in dual peripheral configuration, stm32f7 SOCs contain three CAN peripherals, CAN1 and CAN2 in dual peripheral configuration and CAN3 in single peripheral configuration: - Dual CAN peripheral configuration: * CAN1: Primary bxCAN for managing the communication between a secondary bxCAN and the 512-byte SRAM memory. * CAN2: Secondary bxCAN with no direct access to the SRAM memory. This means that the two bxCAN cells share the 512-byte SRAM memory and CAN2 can't be used without enabling CAN1. - Single CAN peripheral configuration: * CAN3: Primary bxCAN with dedicated Memory Access Controller unit and 512-byte SRAM memory. The driver has been tested on the stm32f769i-discovery board with a kernel version 5.19.0-rc2 in loopback + silent mode: ip link set can[0-2] type can bitrate 125000 loopback on listen-only on ip link set up can[0-2] candump can[0-2] -L & cansend can[0-2] 300#AC.AB.AD.AE.75.49.AD.D1 Changes in v2: - s/fiter/filter/ in the commit message - Replace struct bxcan_mb::primary with struct bxcan_mb::cfg. - Move after the patch "can: bxcan: add support for single peripheral configuration". - Add node gcan3. - Rename gcan as gcan1. - Add property "st,can-secondary" to can2 node. - Drop patch "dt-bindings: mfd: stm32f7: add binding definition for CAN3" because it has been accepted. - Add patch "ARM: dts: stm32f429: put can2 in secondary mode". - Add patch "dt-bindings: net: can: add "st,can-secondary" property". Dario Binacchi (5): dt-bindings: net: can: add "st,can-secondary" property ARM: dts: stm32f429: put can2 in secondary mode ARM: dts: stm32: add pin map for CAN controller on stm32f7 can: bxcan: add support for single peripheral configuration ARM: dts: stm32: add CAN support on stm32f746 .../bindings/net/can/st,stm32-bxcan.yaml | 19 ++++- arch/arm/boot/dts/stm32f429.dtsi | 1 + arch/arm/boot/dts/stm32f7-pinctrl.dtsi | 82 +++++++++++++++++++ arch/arm/boot/dts/stm32f746.dtsi | 47 +++++++++++ drivers/net/can/bxcan.c | 34 +++++--- 5 files changed, 168 insertions(+), 15 deletions(-)