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[v3,RESEND,0/9] drm/bridge: imx: Add i.MX93 MIPI DSI support

Message ID 20230821034008.3876938-1-victor.liu@nxp.com (mailing list archive)
Headers show
Series drm/bridge: imx: Add i.MX93 MIPI DSI support | expand

Message

Liu Ying Aug. 21, 2023, 3:39 a.m. UTC
Hi,

This series aims to add MIPI DSI support for Freescale i.MX93 SoC.

There is a Synopsys DesignWare MIPI DSI host controller and a Synopsys
Designware MIPI DPHY embedded in i.MX93.  Some configurations and
extensions to them are controlled by i.MX93 media blk-ctrl.

Add a DRM bridge for i.MX93 MIPI DSI by using existing DW MIPI DSI
bridge helpers and implementing i.MX93 MIPI DSI specific extensions.

Note that since this series touches the dw-mipi-dsi driver, tests are
needed to be done for meson, rockchip and stm.

Patch 1 ~ 7 do preparation work for adding i.MX93 MIPI DSI DRM bridge driver.

Patch 8 adds DT-binding documentation for i.MX93 MIPI DSI.

Patch 9 adds i.MX93 MIPI DSI DRM bridge.

v2->v3:
* Add Neil's R-b tags from v1 on patch 5/6/7.
* Select GENERIC_PHY to fix Kconfig warning for GENERIC_PHY_MIPI_DPHY
  dependency in patch 9.
* Cc stm and rockchip folks.
* Resend based on the latest drm-misc-next.

v1->v2:
* Add Rob's R-b tag on patch 8.
* Use dev_err_probe() to replace DRM_DEV_ERROR() in patch 9.  (Sam and Alexander)
* Use dev_*() to replace DRM_*() in patch 9.  (Sam)
* Fix build for arm architecture in patch 9.
  (Reported-by: kernel test robot <lkp@intel.com>)
* Improve error messages for imx93_dsi_phy_init() in patch 9.

Liu Ying (9):
  drm/bridge: synopsys: dw-mipi-dsi: Add dw_mipi_dsi_get_bridge() helper
  drm/bridge: synopsys: dw-mipi-dsi: Add input bus format negotiation
    support
  drm/bridge: synopsys: dw-mipi-dsi: Force input bus flags
  drm/bridge: synopsys: dw-mipi-dsi: Add mode fixup support
  drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock rate to calculate
    lbcc
  drm/bridge: synopsys: dw-mipi-dsi: Set minimum lane byte clock cycles
    for HSA and HBP
  drm/bridge: synopsys: dw-mipi-dsi: Disable HSTX and LPRX timeout check
  dt-bindings: display: bridge: Document Freescale i.MX93 MIPI DSI
  drm/bridge: imx: Add i.MX93 MIPI DSI support

 .../display/bridge/fsl,imx93-mipi-dsi.yaml    | 115 +++
 drivers/gpu/drm/bridge/imx/Kconfig            |  11 +
 drivers/gpu/drm/bridge/imx/Makefile           |   1 +
 drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c   | 917 ++++++++++++++++++
 drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c |  91 +-
 include/drm/bridge/dw_mipi_dsi.h              |  16 +
 6 files changed, 1147 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx93-mipi-dsi.yaml
 create mode 100644 drivers/gpu/drm/bridge/imx/imx93-mipi-dsi.c

 base-commit: 25205087df1ffe06ccea9302944ed1f77dc68c6f

Comments

Robert Foss Oct. 16, 2023, 9:42 a.m. UTC | #1
On Mon, 21 Aug 2023 11:39:59 +0800, Liu Ying wrote:
> This series aims to add MIPI DSI support for Freescale i.MX93 SoC.
> 
> There is a Synopsys DesignWare MIPI DSI host controller and a Synopsys
> Designware MIPI DPHY embedded in i.MX93.  Some configurations and
> extensions to them are controlled by i.MX93 media blk-ctrl.
> 
> Add a DRM bridge for i.MX93 MIPI DSI by using existing DW MIPI DSI
> bridge helpers and implementing i.MX93 MIPI DSI specific extensions.
> 
> [...]

Applied, thanks!

[1/9] drm/bridge: synopsys: dw-mipi-dsi: Add dw_mipi_dsi_get_bridge() helper
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=ec20c510ee2d
[2/9] drm/bridge: synopsys: dw-mipi-dsi: Add input bus format negotiation support
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=0de852d4c23a
[3/9] drm/bridge: synopsys: dw-mipi-dsi: Force input bus flags
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=d5116fb29dc0
[4/9] drm/bridge: synopsys: dw-mipi-dsi: Add mode fixup support
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=5a67ec8c64ec
[5/9] drm/bridge: synopsys: dw-mipi-dsi: Use pixel clock rate to calculate lbcc
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=ac87d23694f4
[6/9] drm/bridge: synopsys: dw-mipi-dsi: Set minimum lane byte clock cycles for HSA and HBP
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=d22e9a6df2db
[7/9] drm/bridge: synopsys: dw-mipi-dsi: Disable HSTX and LPRX timeout check
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=743bf594a3b1
[8/9] dt-bindings: display: bridge: Document Freescale i.MX93 MIPI DSI
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=db95a55ccec7
[9/9] drm/bridge: imx: Add i.MX93 MIPI DSI support
      https://cgit.freedesktop.org/drm/drm-misc/commit/?id=ce62f8ea7e3f



Rob