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Tue, 17 Oct 2023 14:47:18 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Tue, 17 Oct 2023 14:47:18 +0800 From: Hsiao Chien Sung To: AngeloGioacchino Del Regno , Chun-Kuang Hu , Krzysztof Kozlowski , Matthias Brugger CC: Philipp Zabel , David Airlie , Daniel Vetter , Rob Herring , "Chen-Yu Tsai" , Sean Paul , , , , , , Singo Chang , Nancy Lin , Jason-JH Lin , Hsiao Chien Sung Subject: [PATCH v3 00/11] Support IGT in display driver Date: Tue, 17 Oct 2023 14:47:06 +0800 Message-ID: <20231017064717.21616-1-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--8.125500-8.000000 X-TMASE-MatchedRID: 2M1vhZdKI+q0Ksgzm0Grb0vrB8UvzFr4uLwbhNl9B5VcKZwALwMGswaT alM8C773zVZHFuZcThYl6rr8933abg7WYEeNmTZn7spMO3HwKCAhHWssEmb8zsRd6VScTqylI6E H/j35nyhiYqp1f8ouR+8AJ9RS6zXQD7+f/jfUYxID2WXLXdz+AbLiLKO9VZOinaIcQMBRvbSjxY yRBa/qJcFwgTvxipFajoczmuoPCq1sVXiEzAZQKTrxL9jf8Q32kxH4pkZWPWronF1rgIxheCQGD b1YJqxA X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--8.125500-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 1B8B68A1E5211F3A5AD423F4B16ADFB010B6C5046DBD0491A959E66D86B718892000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231016_234800_800268_41DE2BE8 X-CRM114-Status: GOOD ( 12.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This series is based on mediatek-drm-next. This series adds support for running IGT (Intel GPU Tool) tests with MediaTek display driver. The following changes will be applied: 1. Add a new API for creating GCE thread loop to retrieve CRCs from the hardware component 2. Support hardware CRC calculation in both VDOSYS0 and VDOSYS1 3. Support alpha blending in both VDOSYS0 and VDOSYS1 Changes in v3: - Modify the dt-binding document of Mediatek OVL - Set DRM mode configs accroding to the hardware capabilities - Replace cmdq_pkt_jump_absolute() with cmdq_pkt_jump() Changes in v2: - Simplify CMDQ by adding commands that are currently used only - Integrate CRC related codes into new APIs for Mixer and OVL to reuse - Add CPU version CRC retrieval when CMDQ is disabled Hsiao Chien Sung (11): soc: mediatek: Add register definitions for GCE soc: mediatek: Disable 9-bit alpha in ETHDR dt-bindings: display: mediatek: ovl: Modify rules for MT8195/MT8188 drm/mediatek: Add OVL compatible name for MT8195 drm/mediatek: Set DRM mode configs accordingly drm/mediatek: Support alpha blending in display driver drm/mediatek: Support alpha blending in VDOSYS0 drm/mediatek: Support alpha blending in VDOSYS1 drm/mediatek: Support CRC in display driver drm/mediatek: Support CRC in VDOSYS0 drm/mediatek: Support CRC in VDOSYS1 .../display/mediatek/mediatek,ovl.yaml | 12 +- drivers/gpu/drm/mediatek/mtk_disp_drv.h | 6 + drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 309 ++++++++++++++++-- .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 23 +- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 261 ++++++++++++++- drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 39 +++ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 6 + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 35 ++ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 40 ++- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 19 ++ drivers/gpu/drm/mediatek/mtk_drm_plane.c | 11 + drivers/gpu/drm/mediatek/mtk_ethdr.c | 121 ++++++- drivers/gpu/drm/mediatek/mtk_ethdr.h | 5 + drivers/soc/mediatek/mtk-mmsys.c | 1 + include/linux/soc/mediatek/mtk-cmdq.h | 10 + 15 files changed, 839 insertions(+), 59 deletions(-) --- 2.18.0