Message ID | 20231220-sa8295p-gpu-v1-0-d8cdf2257f97@quicinc.com (mailing list archive) |
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Thu, 21 Dec 2023 03:50:49 GMT Received: from [169.254.0.1] (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 20 Dec 2023 19:50:49 -0800 From: Bjorn Andersson <quic_bjorande@quicinc.com> Subject: [PATCH 0/8] arm64: dts: qcom: sa8295p: Enable GPU Date: Wed, 20 Dec 2023 19:50:34 -0800 Message-ID: <20231220-sa8295p-gpu-v1-0-d8cdf2257f97@quicinc.com> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAAq2g2UC/x2NQQqEMAwAvyI5b8CmW9j1K7KHWqMGpFsaFEH8u 8HjDAxzgnIVVuiaEyrvovLPBu7VQFpinhllNAZqyTuiFjV+6BsKzmXD4FKY/Nuz5wRWDFEZhxp zWqzJ27qaLJUnOZ5F/7uuG8pwJsZyAAAA To: Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Taniya Das <quic_tdas@quicinc.com>, Ulf Hansson <ulf.hansson@linaro.org>, Johan Hovold <johan+linaro@kernel.org>, "Catalin Marinas" <catalin.marinas@arm.com>, Will Deacon <will@kernel.org> CC: <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-pm@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, "Bjorn Andersson" <quic_bjorande@quicinc.com>, Bjorn Andersson <andersson@kernel.org> X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org |
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arm64: dts: qcom: sa8295p: Enable GPU
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Due to the different PMIC configuration found in the SA8295P platform, compared to SC8280XP, the VDD_GFX pads are supplied by an dedicated MAX20411 LDO. Support for expressing the regulator supply is added to the binding, the support for enabling the parent supply for GX is added, the missing gfx.lvl power-domain is dropped, and the DeviceTree is wired up to enable the GPU in this configuration. Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> --- Bjorn Andersson (8): dt-bindings: clock: qcom: Allow VDD_GFX supply to GX clk: qcom: gdsc: Enable supply reglator in GPU GX handler clk: qcom: gpucc-sc8280xp: Add external supply for GX gdsc soc: qcom: rpmhpd: Drop SA8540P gfx.lvl arm64: dts: qcom: sa8540p: Drop gfx.lvl as power-domain for gpucc arm64: dts: qcom: sa8295p-adp: add max20411 arm64: dts: qcom: sa8295p-adp: Enable GPU arm64: defconfig: Enable MAX20411 regulator driver .../devicetree/bindings/clock/qcom,gpucc.yaml | 3 + arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 69 ++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sa8540p.dtsi | 2 + arch/arm64/configs/defconfig | 1 + drivers/clk/qcom/gdsc.c | 8 ++- drivers/clk/qcom/gpucc-sc8280xp.c | 1 + drivers/pmdomain/qcom/rpmhpd.c | 1 - 7 files changed, 83 insertions(+), 2 deletions(-) --- base-commit: 20d857259d7d10cd0d5e8b60608455986167cfad change-id: 20231220-sa8295p-gpu-51c5f343e3ec Best regards,