From patchwork Wed Jan 10 17:29:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Herring X-Patchwork-Id: 13516331 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1879AC47073 for ; Wed, 10 Jan 2024 17:30:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:MIME-Version:Message-Id:Date: Subject:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=zBoiMX2tJVVICldP6iXxPi2CVjB4aNZ7RagUohX2m94=; b=IaUFdp4kiq7Oe2 IzvJQ9gEVpBjmd7sQgV4sEnqGSAwEnogOckHrIuqLclEsE3aozoaZPnoYi7S+iU2QSf4MuBJNZ1z8 sMLaxELFN8tP2H0M5c7Lp+DXeRuO/lWgYL9yqBPHvISUIr1lNCr4+MGWo8ivj7VBZzr+le0krnLkG 3Mv2D1N4yTHftV9rCO9R4JvgmzjJXHEV4fYjVqQlpzmXHUzGb5IyiyTM2OUziHOmgiC9QZUxsltLE LsiV49HF5dbIXIPJR4d+cdOcwLpptuUYhb3/JfFkZuri8RZNROuUGZ7+buTjE0NCBsU2buawHcdUa t5pykdegSuuPxHmNY5rg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rNcOp-00DA5r-1x; Wed, 10 Jan 2024 17:29:55 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rNcOm-00DA57-0U for linux-arm-kernel@lists.infradead.org; Wed, 10 Jan 2024 17:29:53 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 4FEFECE1D07; Wed, 10 Jan 2024 17:29:50 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2A763C433F1; Wed, 10 Jan 2024 17:29:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1704907789; bh=bs26RKWgi7kqNcbQdz2YXo3TwzsgW9dgH547QBX5bPo=; h=From:Subject:Date:To:Cc:From; b=qBarvP5Bv8UVYmar7xviZ+TB/2xX57G7D0DNZrNj4MwiBFoyRj1A9IZlGwU62AfE9 RoNOkNQPIOjU+SnQgY5OjK7jBrJ7yMmVcwDR8CCeIxyfR//I0PF82PGRd+/YspgvJ+ IA+CQA7GR1k5h7ZO0yv4tQo7aStYbU3MhfK2jPoQr/F3gGdr7Z8aIvYpAolsbuNxOC rCoMvG4DPUryI5xr372YlRIgo7bEeVTIpGUepyWFROBkoN9cWeXV8AAAK/k6B+Cqpu rN11ahfFwYBG0ne5EG9AAz7O7Eb4iuBBovHuN4PtL/QqpZPfqhhhuhZfNOeO6oA9Of 4Do6XIh1j+T3w== Received: (nullmailer pid 2134034 invoked by uid 1000); Wed, 10 Jan 2024 17:29:48 -0000 From: Rob Herring Subject: [PATCH 0/2] arm64: Cortex-A510 erratum 3117295 workaround Date: Wed, 10 Jan 2024 11:29:19 -0600 Message-Id: <20240110-arm-errata-a510-v1-0-d02bc51aeeee@kernel.org> MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAO/TnmUC/x3MMQqAMAxA0auUzBaaqoNeRRxCjZrBKqmIUHp3i +Mb/s+QWIUTjCaD8iNJzliBjYGwU9zYylIN3vnOITpLelhWpZss9dW+DcHjwAHZQa0u5VXe/zj NpXyTmFQXYQAAAA== To: Catalin Marinas , Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13-dev X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240110_092952_388049_809C4A50 X-CRM114-Status: UNSURE ( 9.29 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This short series enables the existing speculative unprivileged load workaround from Cortex-A520 on Cortex-A510 cores which are also affected by the erratum. The erratum number is 3117295 and details are available in the SDEN[1]. Rob [1] https://developer.arm.com/documentation/SDEN1873361/latest/ Signed-off-by: Rob Herring --- Rob Herring (2): arm64: Rename ARM64_WORKAROUND_2966298 arm64: errata: Add Cortex-A510 speculative unprivileged load workaround Documentation/arch/arm64/silicon-errata.rst | 2 ++ arch/arm64/Kconfig | 18 ++++++++++++++++++ arch/arm64/kernel/cpu_errata.c | 21 +++++++++++++++++---- arch/arm64/kernel/entry.S | 2 +- arch/arm64/tools/cpucaps | 2 +- 5 files changed, 39 insertions(+), 6 deletions(-) --- base-commit: b85ea95d086471afb4ad062012a4d73cd328fa86 change-id: 20240110-arm-errata-a510-23cc219ec1e0 Best regards,